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December 1997

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Subject:
From:
Michel Poulin <[log in to unmask]>
Reply To:
TechNet Mail Forum.
Date:
Mon, 8 Dec 1997 09:06:26 -0500
Content-Type:
text/plain
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text/plain (79 lines)
Mr Warhelere,

        Interposer are not magic.   The fact that 1st level packaging is
now assembly house business, reflowing chips become an issue.  So, an
interposer could be interesting in order to facilitated the 1st level
assembly directly on board.
         Nevertheless, interposer will never guaranteed you a KGD beside
helping you to joint die on board.   Finally, keep in mind that every
(intermediate) is another link in the chain and you will have to deal
with the FCA on MCM-L reliability.  My opinion, keep it simple and
perform a good engineering work in order to match all CTE materials.

        Regards,


Michel Poulin
Technical Advisor
Viasystems Canada


> ----------
> From:         J. Warhelere[SMTP:[log in to unmask]]
> Reply To:     TechNet Mail Forum.;[log in to unmask]
> Sent:         Monday, December 08, 1997 5:38 AM
> To:   [log in to unmask]
> Subject:      [TN] Gen: DCA Paradox
>
> Having read November's CircuitTree, I seek the aid of few good,
> erudite
> TechNetters.
>
> Grant that I know nothing -- Please forgive my naive questions.
>
> The problem with direct chip attachment is seemingly defined as not
> having a known good die (KGD).
>
> 1)  When one is mounting a die on an interposer, would the interposer
> not face the same dilemma?  In other words what does the interposer do
> to accomodate the absence of a known good die that the PCB could not?
> (One can see after attachment the features are scaled up for PCB
> attachment, though.)
>
> 2) Where is the crux of the problem?  Is it assembly or
> design/construction ability at the PCB stage?
>
> Tie Me, Fly Me, Whip Me, Flame Me for Asking
> Thanks,
> J. Warhelere
>
> [log in to unmask]
>
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