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December 1997

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Subject:
From:
"George H. Patrick, III" <[log in to unmask]>
Reply To:
TechNet Mail Forum.
Date:
Fri, 5 Dec 1997 11:21:39 -0800
Content-Type:
text/plain
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text/plain (70 lines)
Stephen C Joy wrote:
>
> Text item: External Message Header
>
>      I would like to understand the current capability of pcb manufacturing with
>      respect to thermal relief. The 3 actions would be:
>
>      1. PB mfg places thermal relief patterns at "true" locations in the
>      aperture file.
>
        True
>
>      2. thermal relief are created at PB mfg based on text notes in aperture
>      file. Text notes are complicated and must be associated with the correct
>      "hole" in the case of multiple thermal relief.
>
        False.  The thermal is flashed like any other pad.  You specify what
ID,
        OD, # and size of spokes in your aperture definition file, just
like you
        would with any other flash.
>
>      3. Area fill thermal ties will default to narrowest trace unless a text
>      note in the aperture file is acted upon by PB mfg.
>
        See above.
>
>      Is this true?
>      How do you control multiple thermal patterns?
>
        They are flashed, as long as the layout software can handle that.
>
>      Is the thermal pattern still required?
>
        For thru-hole parts, yes.
>
>      Are there any rules for current vs no thermal relief? ..like hole size,
>      copper weight, etc.
>
        I use IPC specs for internal layers.  Or (shameless plug alert) the
trace
        width calculator on my web site ( http://www.aracnet.com/~gpatrick )
(:-p
>
>      Steve
>

--

    /\          Praegitzer Design
   /\/\         A Division of Praegitzer Industries, Inc.
  /\/\/\        Portland Design Center
 /\/\/\/\       7245 NW Evergreen Pkwy. #100
----------      Hillsboro, OR  97124

George Patrick, Sr. PCB Designer        Email: [log in to unmask]
Voice: (503) 531-2050 ext. 1813         Fax:   (503) 531-2051

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