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December 1997

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Subject:
From:
Stephen C Joy <[log in to unmask]>
Reply To:
TechNet Mail Forum.
Date:
Fri, 5 Dec 1997 09:02:00 PST
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Text item: External Message Header

     I would like to understand the current capability of pcb manufacturing with
     respect to thermal relief. The 3 actions would be:

     1. PB mfg places thermal relief patterns at "true" locations in the
     aperture file.

     2. thermal relief are created at PB mfg based on text notes in aperture
     file. Text notes are complicated and must be associated with the correct
     "hole" in the case of multiple thermal relief.

     3. Area fill thermal ties will default to narrowest trace unless a text
     note in the aperture file is acted upon by PB mfg.

     Is this true?
     How do you control multiple thermal patterns?
     Is the thermal pattern still required?
     Are there any rules for current vs no thermal relief? ..like hole size,
     copper weight, etc.


     Steve

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