Eltek Ltd. - Process Engineering wrote:
>
> At 23:52 15/12/97 -0500, you wrote:
> >As a board manufacturer, I would be reluctant to agree to a 0.7% (.007in/in)
> >flatness requirement without first reviewing the design of the circuitry in
> >question. It is absolutely imperative that the board design is optimized for
> >board flatness before any  control can be achieved. I often state that the
> >top five causes for non-flatness in todays products are, in order of
> >significance:
> >
> >1) board design
> >2) board design
> >3) board design
> >4) board design
> >5) all other factors
> >
> >Dave Rooke
> >Viasystems Canada
>
>  David !
> I just can add my signature to Your statement . How many times we are
> discussing this problem with DESIGNERS !!!
> Most of them do not care about our remarks such us :
> non - symetrical construction regarding dielectric spaces
> unballaced construction regarding signals , ground , VSS
> unballanced copper
> Most of the anwers are : YYY supplied such boards to me without asking all
> question , so take the job as it is or I will go to someone else !
> Edward
>
ARE THERE ANY SPECS OR GUIDELINES TO FOLLOW IN REGARDS TO THE BEST
SPACING, ETC TO ACHIEVE FLAT BOARDS?

THANKS
--
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