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December 1997

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Subject:
Re: filling vias!
From:
"Gary D. Peterson" <[log in to unmask]>
Reply To:
[log in to unmask]
Date:
Mon, 15 Dec 1997 08:13:25 -0700
Content-Type:
text/plain
Parts/Attachments:
text/plain (28 lines) 
Careful with filling vias in wave!  We inadvertantly filled the vias
under a cavity down ASIC one time.  The solder that filled the vias
also contacted the ASIC lid.  We shorted several net nodes together.

--

                                  Gary D. Peterson
    _/_/_/   _/    _/  _/        SANDIA NATIONAL LABORATORIES     _/_/_/
   _/       _/_/  _/  _/        P.O. Box 5800, M/S 0503            _/_/
  _/_/_/   _/ _/ _/  _/        Albuquerque, NM 87185-0503
_/_/_/_/_/_/
     _/   _/  _/_/  _/        Phone: (505)844-6980           _/  _/_/
_/
_/_/_/   _/    _/  _/_/_/_/  FAX: (505)844-2925             _/  _/_/  _/
                            E-Mail: [log in to unmask]        _/_/_/

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