>Here is a general question to start out the week:
>
>Should the wave solder process be required to fill all the vias of a double
>sided/plated thru board?  Why or why not?
*******************************************************

Our wave solder processes don't fill the vias (I don't know if it should
?...apparently not) and that is the reason why we plug vias on solder side
(for vacuum purpose at ICT test).

******************************************************
>Is it a good practice to probe vias for the ICT test?  Why or why not?
>What is recommended?

We probe vias (and those ones are not plugged of course!) at ICT test wich
are not necessarly filled completely with solder. (12 mils with 28 mils pads
and 15 mils with 30 mils pads and we don't have any ICT failure because of
that.  We may have some problems sometimes if, because of misregistration,
soldermask from componant side runs in the hole and overflows on solderside.
Have you look at this possibility ?


Hope this help.

ALaberge

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