Hi Kgchafin !

Our experience is the following: We plug vias on solder side and  on
componant side, we have an aperture in the soldermask which is 6 mils larger
than the via  AND we have "on and off" problems related to this way of
doing.  What happens is that after one reflow (IR oven), the solder in the
vias comes out from the vias on the componant side and creates a solder
bump...and gives us headaches !  So far we have a lot of hypothesis of what
the cause could be but we did'nt point out THE cause.

We may switch to the following method:
Still plug the vias on solder side and have the vias fully covered with
solder mask on the componant side, with and opening that is smaller than the
hole size.  This way the soldermask would run in the hole without plugging
it (to avoid plugging on both side and creating air entrapment).  With this
method we hope we eliminate this "solder bump" issue.

Hope this help.

And by the way, if anybody has a better suggestion (or knows about the real
root cause of those solder bump) we are always open for improvment !

Have a nice weekend.






At 07:42 AM 12/12/97 EST, you wrote:
>We are changing from dry film solder mask to LPI solder mask on all our
>through-hole PCB's (LPI is already used on our relatively small number of
>surface mount boards but we don't have long term field failure data on
>these).  With respect to vias we are leaning toward covering them with LPI
>as we now do with dry film (i.e. not tenting with dry film, not plugging
>with LPI, epoxy etc.--just applying LPI in a single operation using the
>same solder mask artwork we now use which covers the vias).  It may be
>relevant to know that many of our boards are not used in temperature and
>humidity controlled environments.  We do conformal coat most of our boards.
>
>In a recent inquiry on this general subject I received a variety  of views
>on the relative value and problems involved in plugging vias.  I would
>appreciate any views on the above option--just covering vias with LPI with
>no special operation to plug or tent.
>
>Some of the earlier replies suggested partially filled vias cause more
>problems than totally uncovered vias.  Has anyone tried the above option?
>Problems?  No problems?  Would it be useful to minimize via diameters?  Is
>there any useful literature on this subject.?
>
>Thanks to all of you who replied to the earlier inquiry.
>
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--------------------------------------------------
Annie Laberge
--------------------------------------------------
Ingenieure Qualite
Les Systemes Electroniques Matrox
Tel: (514) 685-7230 ext 2933

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