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December 1997

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Subject:
From:
Ed Holton <[log in to unmask]>
Reply To:
TechNet Mail Forum.
Date:
Mon, 15 Dec 1997 07:12:31 -0500
Content-Type:
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Here is a general question to start out the week:

Should the wave solder process be required to fill all the vias of a double
sided/plated thru board?  Why or why not?

Is it a good practice to probe vias for the ICT test?  Why or why not?
What is recommended?

(Our boards are double-sided plated thru, but the annular ring of the via
on the top side is covered with solder mask (not tented) and I am having a
heck of a time filling all the vias (98% success rate). The ICT probes vias
and we are having ICT failures due to unfilled vias and the probe method.
The ICT probes are being switched to a larger tulip type head.  We
inherited this design!!  A lunch (and bragging rights) between ICT and
myself are on the line!)

Ed Holton
Hella Electronics
313-414-0944

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