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October 1997

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Subject:
From:
"Pucket, Larry Lee" <[log in to unmask]>
Reply To:
TechNet Mail Forum.
Date:
Thu, 2 Oct 1997 07:33:48 -0600
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Does anyone know of any design guides for chip-on-board parts to be used
on FR4 material?

What is minimum trace/spacing capabilities that fab shop can do with this
process?

What about pad sizes for wire bonds?

Via sizes?

Any help and/or where to go would be apprecicated.

Larry L. Pucket
Senior PCB Layout Designer
Sandia National Laboratories
P.O. Box 5800  MS-0624
Albuquerque, NM 87185-0624

Phone: (505)844-1711
  Fax: (505)844-7428

Email: [log in to unmask]

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