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October 1997

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Subject:
From:
Greg Bartlett <[log in to unmask]>
Reply To:
Greg Bartlett <[log in to unmask]>
Date:
Wed, 15 Oct 1997 10:18:48 +0000
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Charles,
Here are some comments based upon our experiences as an OEM that
outsources all board level assembly.  The vast majority of our boards have had
BGAs on them for the past 4 years utilizing 8-9 different varieties of CBGA,
PBGA, and TBGA devices.

Regards,
Greg Bartlett
Mercury Computer Systems
Chelmsford, MA
[log in to unmask]

>Subject:  Assy: BGA, dummies, pad finishes, stencils, profiles, SM
opening
>      size, Bd material

>For those of you who have experience with BGA's, help!  We don't want to
>totally re-invent the wheel!
>
>1. Do you know of a source for dummy practice parts other than TopLine?
>They don't have this particular size.

-> We had better success asking for mechanical samples from the device
suppliers themselves.

>2. Comments about OSP pad finishes? Will they tolerate all the process
>steps and still protect against oxidation at the latter stages? It could
be
>that the process may stretch out over several days. e.g., reflow and
wash
>day one, second reflow and wash on day two or three, and then final
through
>hole and wash on day four or five. Anything could stretch out the
over-all
>process time such as weekends and holidays.

-> We went exclusively to OSP finishes that can tolerate multiple reflow
operations after having disasterous results with HASL finishes with CBGA
devices early in our work.  HASL finishes might have improved since then,
but we have no reason to try them again.  We don't have huge quantities of
boards in production, so assembly tends to not stretch out that long, and
we haven't really seen problems with the OSPs in such applications.
>
>3. What about other pad finishes? Palladium, Gold, Plain old hasl?

-> Looked at e. Palladium and i. Gold, and they both did fairly well in
assembly trials.  Soldermask compatibility with the aggressive e. Nickel
bath that precedes the final finishes wasn't all that great.  There were
some combinations of masks and bath types that had some problems.  We may in
the future go to these finishes as these problems are worked out.

>4. What stencil thickness for BGA? Do you find .006" sufficient? Have
you
>experienced bridging with .008"?

-> Our CBGAs are typically soldered with an 8 mil stencil.  I can't
recall any of our assemblers going below this.
>
>5. Did you find that your oven profile changed drastically from that
used
>for boards with, say, 200+ pin leaded devices?

-> Not sure, but I don't think so.
>
>6. What about solder mask defined pad areas as opposed to SM opening
bigger
>than the pads?

-> We don't use soldermask defined pads.  I understand that some believe
that this is better, but we don't agree.
>
>7. With this large of a device (40mm x 40mm) I am concerned about CTE
>mismatch over the operating temp range specified as well as the process
>temp range to which it will be exposed.  What board materials would you
>recommend?  Would you spec one of the higher Tg materials?  Why?  I will
>need to provide cost justification for wanting this more expensive and
for
>some shops, more difficult to process, material.

-> We found it necessary to go from the "regular" (i.e., difunctional)
FR4 to the multifunctional blends.  Right now we use the 170-180 C Tg FR4 as
well as some polyimide blends on certain products.  We found that the
weak link in this technology wasn't the solder joints (for our applications),
but rather the array vias within the board.  For adequate routing, narrow
vias and thicker boards are often necessary, and this is where we found
failures early on.  By going to the better dielectrics, we found far fewer
failures.  A recent paper by Greg Martin from IBM at SMI 97 echoed these
results.
>
>8. What are your responses to the questions above for Micro-BGA?

-> No experience with it.

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