Subject: | |
From: | |
Reply To: | DesignerCouncil Mail Forum. |
Date: | Thu, 2 Oct 1997 10:56:57 -0500 |
Content-Type: | text/plain |
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section 3.5.3.3 and 3.5.3.4, make reference to bare uncoated and coated
(soldermask?) boards
I would interpret Table 3-1 B2 to apply to bare boards with no
soldermask...
it does seem though that perhaps this section was written for technology
some years back....
Thanks,
LT
> -----Original Message-----
> From: [log in to unmask] [SMTP:[log in to unmask]]
> Sent: Thursday, October 02, 1997 10:39 AM
> To: [log in to unmask]
> Subject: [DESIGNERCOUNCIL] via/via spacing
>
> Fellow designers;
> Do I understand IPC-D-275 Table 3-1 Column B2 as applying to minimum
> spacing between pads and/or vias?
> If so; I'm ashamed to say that I've been in violation for as long as
> I've ever designed circuit boards. I've always set via/via, via/pad,
> and pad/pad spacing to the same as the spacing for traces. ( 13/12,
> 10/10, 8/8, whatever )
> George Uptain - Development Technician IV
> Schlumberger Oilfield Services Austin, Texas
> (512) 331-3183
>
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