Eddie Brunker wrote:
> <snip>
> Press Fit connectors can be mechanically inserted without soldering
> therefore the via can be connected to the plane along its full circumference
> with no thermal relief (a solid contact). This solid contact in turn gives
> lower inductance for power pins on a backplane.(Which is what the designers
> want).
> I get the impression that Press Fit is used not just by Compact PCI
> protocall (in our case 6U card computers) but anyone heading at high bus
> speeds in a backplane.
Very true. We have seen press-fit connectors in use in a number
of large scale systems.
> connectors to address this is seriously worrying. Why should the Design
> fraternity dictate the assembly technique and not the end result required.
We (the Design community) need to be involved in assembly methods
selection. Otherwise we have no way to anticipate or provide for
the manufacturing communities' collective needs.
> In other words if they want reduced inductance why don't they just specify
> no thermal relief and let the assembly heads worry about the means of
> connection and whether soldering will be a problem.
IPC's spec (D-275) is pretty clear on what's allowable for thermal
connections in a wave-soldered environment. There are increasing
cases where wave is not possible, and press fit allows another
method for mass termination of dense connections. While it is a
secondary operation, it is less burdensome than selective wave
or fountain solder, at least with what I've seen and been told.
> APPLYING A FEW TONS OF PRESSURE TO AN ASSEMBLY to attach a connector seems
> to me to be primitive method.
Like a blistering thermal excursion, or contact with a substance
at much higher than Tg, what appears as brutality actually will
work quite well with a little finesse added into the mix. A pwb
structured for press-fit will have a very well defined construction
in the plated through hole, such that the compliant pin makes con-
trolled contact with the barrel in soft metal.
> Does anyone out there use solid connection to vias on copper planes for the
> wave soldering process? Has anybody done any trials on this?
Not allowed per IPC specs. This comes from a concensus of many
assembly heads that tried to get good yields, my guess.
> It would be nice to see the design people told that there should be a STOP
> TO THIS BARBARIAN ASSEMBLY TECHNIQUE. It would be nice to see the connector
> manufacturers make connectors which provide shielding and conform to Compact
> PCI format and IEC1076 (or high speed bus formats) in Plated Through Hole OR
> Surface Mount packages.
> Pressumably SURFACE MOUNT WOULD HAVE NO THERMAL RELIEF DEMANDS as modern
> Convection ovens have no problems dealing with solid contacts to vias. So
> why not develop the Surface Mount version of the connector?
Surface mount also offers very little mechanical support for large
connectors or repeated insertions by field service folks with ham-
mers.
Larry Campbell wrote:
>>
>> By no means should you press fit a connector or pin of any sort
>> into a platted thru hole that has intermal layer thermal layers, or
>> internal pads for that matter. By pressing the pin into the hole
>> you run the risk of breaking the continuity of the PTH and not
>> make a connection to the internal layers, or possibly making
>> only intermittent connections internally.
I have to disagree with Larry, but will grant the caveat that
design, fabrication, and assembly resources all need the basic
understanding to plan for this assembly method. It's tried, it's
true, and it saves a thermal excursion or other torturous method
for high-density and/or large connectors and backplanes. I'd
venture to guess that most of the telephone traffic today travels
through systems put together this way, as well as most cabinet
style computers.
Are there any real alternatives? Is the assembly community ready
for intrusive reflow of 800 pin connectors on 2mm spacing? How
about wave solder on a .250" thick board with 30 layers? Press
fit components and methods, deployed properly, enable a finer
geometry on a larger scale than thru-solder methods, and offer
more mechanical strength.
Let's see: Electrically better, higher density, more robust, no
thermal cycle, accessible for In-Circuit-Test, all at the cost of
slightly better than vanilla PTH tolerancing. Sign me up!
My two cents' worth.
Regards to all,
--
Jeff Seeger Applied CAD Knowledge Inc
Chief Technical Officer Tyngsboro, MA 01879
jseeger "at" appliedcad "dot" com 978 649 9800
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