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September 1997

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Subject:
From:
Steve Collins <[log in to unmask]>
Reply To:
TechNet Mail Forum.
Date:
Fri, 19 Sep 1997 12:06:57 -0600
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Hello everyone hope I can get some more advice:

We had a Capacitor manufacturer in our plant the other day and we were
talking about design consideration of chip components. A statement that it
was not necessary to use thermal reliefs to connect the SM component pad to
a large ground plane (we design RF boards to 860 MHz soon to 1Gig). That
the practice of using the soldermask to define the solderable area in these
large ground planes was sufficient. This seems to go against the earlier
practices of requiring thermals to prevent thermal shock, tombstoning of
the parts & Rework considerations. We use both top side and bottom side SMT
and sometimes on the same board. Our EE's love this idea but are we asking
for trouble in reliability down the line

My question:

How are other people in the industry dealing with this issue?

Has anyone gone this rout and then returned to using thermals. If so can
you share your problems or findings.

Thanks again for everyone's help.

Steve Collins
PCB Design Supervisor
Antec Network Technologies
[log in to unmask]

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