Subject: | |
From: | |
Reply To: | TechNet Mail Forum. |
Date: | Fri, 1 Aug 1997 13:00:30 -0400 |
Content-Type: | text/plain |
Parts/Attachments: |
|
|
Tom, in my most recent discussions with board vendors, the smallest I
can get away
with without special handling is .025 pad external, .027 pad internal,
.040 void for planes,
and .012 +/-.003 finished hole. Suggestions also include tear dropping,
to limit hole break-out.
I am interested in hearing what other designers are specifying as
minimums.
Regards,
John E. Shaub
Honeywell IAC Inc.
> ----------
> From: Thomas Kropski[SMTP:[log in to unmask]]
> Sent: Friday, August 01, 1997 12:06 PM
> To: [log in to unmask]
> Subject: Via hole/pad size
>
> As a PWB designer, one of my goals is not to design circuits which
> cause
> problems during fab or test.
>
> >From the fab persons, what is the smallest reliable via hole/pad
> size
> combination acceptable in normal fabrication. I would expect these
> boards would have to meet IPC Class 2 or 3 requirements.
>
> Appreciate your responses.
>
> Thanks in advance,
>
> Tom Kropski
> Sierra Technologies, Inc
>
> **********************************************************************
> *****
> * TechNet mail list is provided as a service by IPC using SmartList
> v3.05 *
> **********************************************************************
> *****
> * To subscribe/unsubscribe send a message <to:
> [log in to unmask]> *
> * with <subject: subscribe/unsubscribe> and no text in the body.
> *
> **********************************************************************
> *****
> * If you are having a problem with the IPC TechNet forum please
> contact *
> * Dmitriy Sklyar at 847-509-9700 ext. 311 or email at [log in to unmask]
> *
> **********************************************************************
> *****
>
|
|
|