TECHNET Archives

August 1997

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
Greg Parke <[log in to unmask]>
Reply To:
TechNet Mail Forum.
Date:
Tue, 5 Aug 1997 17:55:17 -0400
Content-Type:
text/plain
Parts/Attachments:
text/plain (19 lines)
Hello TechNetters,

Has anyone out there designed a test board specifically for evaluation of
screenprinters and/or screenprint process DOE.
If so, what types of land patterns did you include? BGA, mBGA, other CSP,
Fine Pitch (15,20?).  Would you be willing to share the design?  I realize
Topline has a board to do this but I feel that it does not include some of
the newer packaging technologies and would like to cover all the options.
I am also familiar with a board which was designed for stencil evaluation
for AMTX and which was given out at NEPCON west.  I am currently looking to
evaluate my screenprint process based on volume of solder deposited and
height of the bricks.  Are there any other measurable results I may want to
consider?  Also, I would be interested to know what others are doing for
process control and SPC at their screen print operations.

Greg Parke
(617) 422-3192


ATOM RSS1 RSS2