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August 1997

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Subject:
From:
Paul Gould <[log in to unmask]>
Reply To:
TechNet Mail Forum.
Date:
Mon, 4 Aug 1997 21:10:13 +0100
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>  John..
>         I'm still surprised! We have been designing 12-14 layer (standard)
>   smt designs for about a zillion years, maybe not quite a zillion, but
>   a looonnng time and no vendor has ever requested that the inner layer
>   pads be larger. In fact, unless I am looking at the formula/chart in
>  the Mil and IPC specs incorrectly, the minimum annular ring requirement
>  for internal is .001/.002 mils vs .002/.004 mils for external layers.
>  Therefore, by definition, your external pads should be larger. What
>  am I missing???
>                                       Regards,
>                                                  Bob
Hi all,

It sounds like the specs referred to here are for the finished pwb. To
achieve this on the finished board will require much greater land on the
inner layers than the external layers.

This is of serious concern to fabricators as it seems that designs are
frequently laid out to minimum finished pwb clearances without thought
for the manufacturing tolerances.

The main benefit of putting down larger pads on inner layers is to
create a bigger separation between the holes and adjacent unconnected
copper traces or ground plane. It is these gaps which are more critical
than the land.

Another consequence of very tight tolerances is to reduce the panel size
which can be manufactured thereby increasing cost. Talk to you
fabricator to find out what they need to achieve your tolerances on the
finished board, and give them more if you can.

Regards
--
Paul Gould
Teknacron Circuits Ltd
[log in to unmask]
Isle of Wight,UK


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