Greetings

I have been going through the "IPC-SM-782A" (OCT 96) manual.
On page 35 (section 3.7.1) The following statement is made:

     The pad cap concept has two yield improvement benefits: 1)
     no fine conductor geometries on the outer layers because they
     are buried in the inner layers where conductor width control
     is significantly easier, ........

My question is,.......  If you are useing the same design rules (line
width and spaceing) and (most likely) the same etch process on the
inner layers as on the outer layers. WHY then would it be easier
to maintain conductor width control on the inner layers than the
outer layers?

Have a good yall.

Thanks
Walter L. Williams, Senior Circuit Board Designer
I-O Corporation, SLC, Utah
Voice: 1-801-972-3558 ex 123
Alternate: 1-801-973-6767

Carpe Diem