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July 1997

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Subject:
re: Solderability Tests for PCBs
From:
LES CONNALLY <[log in to unmask]>
Reply To:
LES CONNALLY <[log in to unmask]>
Date:
Wed, 30 Jul 1997 15:05:39 -0700
Content-Type:
text/plain
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text/plain (63 lines) 
Hi Mike,

You might contact Jim Reed of Raytheon/TI with regard to a SERA unit. He has
done extensive evaluation of solderability with wetting balances,etc. A
complete program while working with the NCMS consortium was done utilizing the
SERA was accomplished and, I believe, the data was presented at IPC.

His e-mail is [log in to unmask]

Regards,

Les Connally

[log in to unmask]

>  From: Mike Masters <[log in to unmask]>, on 7/30/97 11:47 AM:
>  
>  Good Morning,
>  
>  I am in need of implementing a solderability test for PCBs received from 
>  bareboard suppliers.  The test should be simple and quick.  Does anyone know 
>  of 
>  a procedure for solderability that might be used?
>  
>  mike
>  
>            
>  -- 
>      /\    
>     _\/_   
>    /_/\_\  
>  
>  Mike Masters
>  QA Materials Engineering Section
>  Office: (919) 479-3771
>  FAX:    (919) 479-3328
>  Internet:  [log in to unmask]
>  
>  
>  
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