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Date: | Mon, 21 Jul 97 11:21:18 MST |
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Hello,
Some Telecommunications Industry specifications require SIR and
Ionic contamination levels meet certain requirements after oxide.
Rich
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Richard Olsen Telephone (602)-232-9154
Continental Circuits Corp. Main (602)-268-3461
3502 East Roeser Road Fax (602)-268-0208
Phoenix Arizona Pager (602)-310-6245
85040-2905 Internet [log in to unmask]
USA I make circuit boards,what do you do?
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Subject: Fab: Innerlayer cleanliness/Fine lines&Spaces
Author: [log in to unmask] at INTERNET
Date: 7/21/97 10:49 AM
With finer lines and spaces, innerlayer cleanliness becomes more important.
We've observed some innerlayer cleanliness issues on product that showed up
after burn in of the assembly. All of the data I see being collected by
board shops is for the final board cleanliness. At these shops, innerlayer
cleanliness is controlled by how good the DES line is working but all the
SPC data for that line relates directly to how well you develop, etch, strip
not how clean the final product is at the end of the line. What are board
shops and/or users of boards doing to ensure that they are getting product
with good clean innerlayers?
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