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Date: | Wed, 16 Jul 97 21:41:14 EST |
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I beg to differ, but the P.O. is the last place where I
would like to see anything of any importance documented.
The "doers" (i.e., plant mfg. and eng. folks) rarely see the
P.O., and sometimes the P.O. is not available until after
engineering or manufacturing of the circuit board is
started, especially in a quick-turn environment.
Via plugging of the same hole from both sides is also not
recommended. There is an outgassing problem when the second
plug side is baked, and the plugs oftentimes will explode in
the oven.
I would also highly recommend a "via plugger artwork" be
supplied in the Gerber package. This clearly defines what
vias are to be plugged and is easily created by picking the
via pads to be plugged from the outer layer artwork.
Sometimes if a via is used as a test point, then this via
should not be plugged.
Yes, the side from which the vias are to be plugged should
be defined on the blueprint, or if it is always the same
side on every part, in the board fabrication specification.
Tom Coyle
Field Services Engineer
HADCO Corporation
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