>From what I understand, the signal delay attributed to trace length is
around 1.7 nanoseconds per foot... that would mean you'd need nearly 3 foot
long traces to accomplish the delay... unless I have the numbers wrong.
Seems like you're just asking for trouble with such a long trace for a
critical processor signal.

AndyB

>>>Ray Klein wrote:

I am designing a highspeed processor board and have come to the amazing
requirement of having a VERY precise delay of 4.8 +/- .25 nanoseconds.

Is this achievable in volume production printed circuit boards?
I am using FR4 medium and have 8 layers to work with. What geometries
and layering are best?

My alternatives a custom/graded silicon delay lines or, perish the thought,
an
adjustment pot. Please help!!


Ray Klein


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