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April 1997

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Subject:
From:
"Raymond Klein" <[log in to unmask]>
Date:
Tue, 22 Apr 1997 11:01:50 -0700
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I am designing a highspeed processor board and have come to the amazing
requirement of having a VERY precise delay of 4.8 +/- .25 nanoseconds.

Is this achievable in volume production printed circuit boards? 
I am using FR4 medium and have 8 layers to work with. What geometries 
and layering are best?

My alternatives a custom/graded silicon delay lines or, perish the thought,
an
adjustment pot. Please help!!


Ray Klein 

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