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March 1997

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Subject:
From:
Poh Kong Hui <[log in to unmask]>
Date:
Mon, 17 Mar 1997 21:23:17 +0800 (SST)
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Hello Neil

Try board with gold-finished or SMOBC. It help to reduce the solder 
defects.

We have board with 11 QFP - 208 pins of 20 mil. So far, the soldering 
defects (on the QFP) we have, is mainly due to lead coplanarity and 
board warpped.

SSD, it seems pretty expensive process (in my opinion)

Poh.

----------------------------------------------------------------------------
-------------------
At 08:04 AM 3/11/97 -0600, you wrote:
>Hello Technetters!
>
>   My company has been manufacturing a PCMCIA ARCNET interface card (20 mil
>pitch) for just over a year now, using screen printer technology. We have
>been tuning our process consistantly, but we are still not happy about the
>amount of rework needed. (About 15% are reworked in each run) We build in an
>8-up panel (2x4)0.020 thick PCB. DeHaart screen printer, Mydata TP9-2 PnP,
>and Vitronics convection reflow (natural atmosphere).  
>    Lately I have received info about Solid Solder Deposit(SSD) technology,
>in which the PCB panel is "pre-soldered" at the board house, and a "sticky"
>paste flux applied just prior to assembly. The purveyors of this technology
>are tooting their horns long and loud about registration, coplanerarity and
>such, but I would like to know from techs who use it:
>
>           1. Does it work?
>           2. Is it cost effective?
>           3. Is there a "no-clean" sticky flux?
>           
>  I would appreciate any insight that you could give me in this matter.
>
>Neil Maloney
>Contemporary Control Systems
>www.ccontrol.com
>
>          
>
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