Hi Chris,
What you are asking for, if I understand correctly is not going to be
generally available. The problem is that every die pad out is different.
Very often this is the case even for die of the same function
fabricated by different wafer fabs of the same company. The I/O patterns
for BGAs are, however, registered by JEDEC this to facilitate movement
of packages into the mainstream of electronics. Thus you must design
your BGA for each new die with its distinctive pad out.
Regarding layout I would look to the pioneering companies...
IBM, Motorola, Amkor, ASAT, and many others have widely published
their findings re: manufacture, design, assembly, inspection, test
and reliability. Any of them should be able to coach you through,
either through papers given or through their technical literature.
Good luck with your project,
J.Fjelstad
At 12:33 PM 2/4/97 -0800, you wrote:
>Hello,
>
>I am in search of a tool that supports
>the creation of a bonding diagram for
>ball grid array (BGA) (Chip Scale Packaging)
>packages. Said tool would allow the desinger
>to connect bond sites on the die (silicon)
>to balls (bumps) on the BGA package. It would
>also have the capacity, therefore, to have
>specific package database input (say, what are the
>coordinates for a 352 bga, what are the power
>rings, etc.) and represented to the designer to
>enable hookup.
>
>Anyone?
>
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