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February 1997

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Subject:
From:
"Jonathan Whitcomb" <[log in to unmask]>
Date:
Wed, 19 Feb 97 17:11:42 EST
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    We're experiencing problems with location slot damage coming from AOI
(optical test) and defect verification of innerlayer cores.  Our test systems
need to locate accurately (within 1-3 mils) to do the test, and are currently
locating using pins in the same centerline slots we use for subsequent
lamination into composites.  We'd like to move test to an auxiliary set of
slots somewhere else on the panel that would be punched in at the same time
as the regular slots, but are facing significant retooling costs across two
punches and a multiplicity of testers.
    What do other folks do?  Is there an easier way?

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