Dear Colleagues,
As a guest in your circle from the other side of the ocean, i´m looking
with great interest to your discussion about the relation between
annular ring, pad-size, break-out and reliability of pcb´s and i highly
appreciate all views and inputs. 
In the past i always was confused by the definition in IPC-D-275, Table
5-11 which says, that annular rings on inner layers could be smaller
than on outer layers, which in some standards and used in the formula
for land size calculation in 275, as a result, gave smaller lands for
same drill sizes on inner layers, ignoring the effect of
layer-misalignment in multilayer boards. 
Therefore, i totally agree with the statement of dave rooke. To accept
breakouts leads to an uncontrolled reduced spacing between drills and
the adjacent circuitry and therefore a high reliability risk, especially
in high-density-designs. 
In my company we succesfully controlled the risk with same land-sizes on
all layers and no acceptance of breakouts. This was a reaction, some
years ago, when we faced reliability problems on (tested)boards with
breakouts, especially lost connections on inner-layers after thermal
stress. 
We actually use 0.3 mm (12mil)drill-size (final) in 0.8 mm (32mil) pad
for the smallest vias, and have no problems. Sometimes on small and very
dense boards, we reduced the land-size to 0.7mm (28mil) 

I think, this subject is still another discussion, than the
technological question, whether a trace directly connected to a drill is
a reliable connection. (Statement of Bob Holmes). I´m very interested in
the results of the ITRI reliability study. Can you tell me, how to get
it.
(please excuse my imperfect english, i hope it´s clear, what i mean)

Rainer Taube
TAUBE ELECTRONIC
Berlin, Germany

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