Mirka Halas <[log in to unmask]> writes
>Our present requirements are (external and internal) 0.002 inch annular
>ring, except in the area adjoining the conductive trace where there
>shall be 0.005 minimum annular ring.
>
Two questions:
1) Is this your spec for the finished pwb and what minimum annular
copper do you specify to achieve this?
2) If you are designing with 0.002" annular ring then how do you achieve
the 0.005" at the trace?

Internal and external layers should have different rules:-
There is no problem with hole breakout on via holes on outer layers and
landless vias are commonplace. The only factor is the reduction in
copper separation due to breakout. It is good practice to teardrop the
pad so that the trace widens at the pad junction but not essential.

Inner layers must have teardrops on tight pads because the weak link
will be where the hole wall joins the trace with a small cross-sectional
area of contact. The limitation on inner layers is not so much the land,
but the separation between holes and adjacent copper areas. Where outer
layers can have very small clearances, inner layers have to tolerate
more misregistration for numerous reasons. I like to see at least 0.015"
clearance hole to adjacent copper to ensure the finished pwb has at
least 0.007" minimum. This means that pads can be larger on inner layers
because there is more space available.

I have seen manufacturing problems caused by using the same annular ring
and copper/copper clearances for inner layers as for outers resulting in
traces running too close to holes even though there is plenty of space
available. Using a larger annular ring on inner layers with the same
copper/copper clearance, say 0.008" annular ring + 0.007" copper/copper
clearance would achieve the minimum hole to copper separation of 0.015".
If you can give more without penalty then please do so.

If you have a CAD system which cannot put teardops on tight pads, then
the pwb manufacturer should be able to do this with their CAM software
automatically and globally.

All things are possible but the result of tight clearances is to reduce
the pwb manufacturers panel size resulting in a disproportionate
increase in price.

Hope this helps.
Regards- 
Paul Gould
Teknacron Circuits Ltd

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