Doug McKean wrote:
>
> Bilal Khalaf wrote:
> >
> > Dear Techies,
> >
> > Is there a significant advantage in using ARCS instead of 45 degree
> > angles when routing traces?
> > Advantages in inductance/resistance.... you know the usual.
> >
> > Thanks in advance.
> >
> > bilal
>
> As far as a 5 inch trace (for example) be it arc,
> 45 degree, or 90 degree the inductance/inch
> and resistance/inch of a trace doesn't care.
> If you're asking for a significant difference,
> then it's a wash.
>
> Expanding beyond this can get pretty hairy and alot
> of rocket science has gone into this topic.
>
> Suppose crosstalk needs to be minimized between
> traces. No matter what geometry is chosen, if the traces
> are physically very close to one another, then again,
> it won't matter. They'll still crosstalk.
>
> There's been much discussion in the past on this topic
> and I'm sure someone out there can shed some more light.
>
> *******************************************************
> -------------------------------------------------------
> The comments and opinions stated herein are mine alone,
> and do not reflect those of my employer.
> -------------------------------------------------------
> *******************************************************
> Hi Bilal & Doug --
Hi Bilal & Doug --
Sorry for the delay in responding to the inquiries and response, but perhaps I can help.
As with any high frequency/speed electronic circuit, variations in conductors can cause
electrical "reflections" of the electrical signals and effect electrical signal
integrity. In particular, anything we do in a "serious" (electrical) printed circuit
design; such as change conductor width, add land, via, component hole, dielectric
thickness, polymeric coated or non-polymeric coated and others will result in changes of
the electrical resistance, inductance or capacitance, all of which will effect the
impedance of the conductive patterns.
First the more/less heavy info:
EFFECTS AT LOW OPERATING FREQUENCIES
At low frequencies (like direct current and at frequencies where there are essentially
no inductive effects) the electron current flow is of relatively uniform current density
across the width and thickness of the conductive pattern for "straight" conductors.
As shown in Figure 1, the small "i's" represent a macro-sized path of current flow and
the "-" represents the edges of the conductor width (per the IPC-T-50 definition) in the
"x-axis" direction.
-------------------
iiiiiiiiiiiiiiiiiii
iiiiiiiiiiiiiiiiiii
iiiiiiiiiiiiiiiiiii
------------------- Figure 1.
Even at "low" frequencies, in theory, the electrical current will start to bunch up
along the path of less resistance, Figure 2. This is due to the increased length of
each electrical path of further radius from the origin "O". The "|" represent the edges
of the conductors in the "y-axis" direction.
Comment -- yes, it is realized this simple model isn't 100% because there will be a
redistribution of electron current density in the "shorter" macro-paths of current, but
the concept is there. In theory, due to the greater electrical resistance along the
outer conductor edge, there would be no (minimal) electrical current.
--------------|
i i i i i i |
i i i i i i |
i i i i i i i |
------O i i i |
| i i i |
| i i i |
| i i i | Figure 2
HIGH FREQUENCY CONSIDERATIONS
Now to extend the concept to high frequencies; we will simplify things by skipping
resistance and overlook the effect of skin-effect -- what a cop-out (;-)
The effect on "Capacitance":
Simplistically, let's assume the capacitance of the conductor to it's reference plane is
uniform across the conductor width for straight conductors. When we hit a "90" degree
bend, we've added some addition conductor area to the transmission line's conductor
width (beyond the full conductor width radius as indicated by the "+" symbols), and
therefore have added some additional capacitance. This addition capacitance "locally"
reduces the characteristic impedance of the conductive pattern in the location of the
bend.
----------------------------|
c c c c c c c c c c c + + + |
c c c c c c c c c c c c c + |
c c c c c c c c c c c c c + |
--------------------O c c c |
| c c c |
| c c c |
| c c c | Figure 3
The effect of on "Inductance":
At higher operating frequencies, the effective current density and "bunching" effect
becomes more dominant due to the current flow taking the path of least inductance (and
impedance).
--------------------P-------|
l l l l l l l l l l l + + + |
l l l l l l l l l l l l T + |
l l l l l l l l l l l l l + |
--------------------O l l l P'
| l l l |
| l l l |
| l l l | Figure 4
"Electrically" a 90 degree corner looks like a low-pass "T" filter at some
frequency(ies). In Figure 4 two reference locations "P" and "P'" "input and "output"
terminals for the low pass filter and the "T" represents it's "center" junction. The
for electrical schematic for the low-pass filter is shown in Figure 5. The series of
"n" are the camel's humps for an inductor symbol and represent the increased inductance
in the corner of the conductive pattern. The thing to the right of the "C" is supposed
to represent the symbol for a capacitor and this represents all of the excess
capacitance represented by the "+'s" in Figures 3 & 4.
L L
P__nnnnn_T_nnnnn__P'
__|__
C _ _
/ | \
__|__
/ / / / "reference ground" Figure 5.
At higher frequencies, this low-pass filter network will become a "high impedance" as a
function of the frequency, the end effect will be to reflect back to the signal's source
these higher frequencies.
How to reduce the problem (using very simplistic "rules-of-thumb" and a very broad paint
brush:
Both of these will work to about 10 GHz (give or more-take a few).
* Full-radius on the outer conductor edge.
* Bevel/chamfer the outer corner from P-to-P' so the effective conductor width is
about 60% of the conductor width.
Better yet is to have a "full" inside radius of at least 4X the conductor width
WHAT'S THE "REAL-WORLD" EFFECT
About 10 years ago, Lee Ritchey (then at Shared Resources, now with 3Com) designed an
experiment in conjunction with Ambitech Inc. (a manufacturer printed boards). What he
(they) did was to design into the test specimen three ways of routing a conductor to a
land; with what were termed a "round, 45 degree, and square" entry. Then they zapped
the transmission line with a TDR (time domain reflectometer) and measured the results.
The TDR had a rise-time of about 0.125 ns [Ralph's comment - this rise time is a
critical limit].
With the TDR readings they obtained the following results:
The "45 degree" end measured 51.5 ohms
The "square" end measured 51.4 ohms
The "round" end measured 51.3 ohms
I thought Lee's comment was "right-on" and very appropriate, "The fact that there is no
measurable difference in these traces would suggest that imposing special entry angles
to control reflections is founded in something other than scientific measurement."
(Ralph's comment - traces should be conductors.)
RALPH'S ANALYSIS AND COMMENTS-
The key is the TDR's rise-time of 0.125 ns. The following are some very broad
"rules-of-thumb" to convert the 0.125 ns rise/fall time to a "clock" frequency. This is
to give us a "kind of feel" for when our circuit might start to suffer from "PCP" (poor
circuit performance).
Converting rise time to a frequency domain bandwidth is accomplished by dividing the
rise(or fall) time into about 0.37 give a band width of about 3 GHz, which is the
"minimum" upper frequency for a reasonable "Fourier Series" of frequencies to generate
the test rise time with reasonable signal integrity. For pulse/digital signal
applications, a couple of "rule-of-thumb" boundary conditions: First, a good Fourier
Series reproduction of a square wave requires at least the first 5-9 odd harmonics of
the fundamental, for easy "back-of-the-envelope-calculations" lets use 10, this means
the fundamental frequency would be about 300 MHz; Then secondly, as a check, for most
square wave clock applications, the total of the clock's rise/fall times are almost
always less than 20% of the period which is 1.25 ns (5 times the sum of the rise and
fall times (0.25 ns)), then converting 1.25 ns period frequency is 1/period which is 0.8
GHz or 800 MHz.
What's this mean???? If you don't want to control the "conductor" routing bends, and
you want a good clean high signal integrity "square-edged" square wave then limit your
clock frequency to less than 300 MHz, or if your circuit can tolerate "trapezoidal"
clock edges then limit the clock frequency to about 800 MHz.
If you're serious about signal integrity, then use a good "electrical characteristics
simulation program" that has been thoroughly tested and approved, or conduct an
experiment and do some testing using one of the newer TDR's with the best capability you
can find (afford).
Hope this helps,
--
Ralph Hersey,
Ralph Hersey & Associates
PHN/FAX 510.454.9805
e-mail: [log in to unmask]
--
Ralph Hersey,
Ralph Hersey & Associates
PHN/FAX 510.454.9805
e-mail: [log in to unmask]
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