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Date:
Mon, 22 Jul 96 09:04:11 +0800
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The JEDEC Stds for Surface Mount Components sometimes specifies both HIGH 
and LOW profiles in the same drawing. (The reference table is different).

The component profile height (or sometimes called the standoff height) is  
measured from the base of the body to the seating plane of the leads.

                 __________             Profile height
             ../           \...        |
            /  \___________/ - \--------
        --/                      \------
                                       |

The low profile component (in and out of JEDEC specs) usually refer to 
those with 0-7 mils and the high profile from 8 mils. The preference of 
each of this , I beleive, depends on the SMT process that is being used 
(aqueous or no-clean).

regards

Jeff-MH Tan
Hewlett Packard
Integrated Circuit Business Division 


______________________________ Reply Separator _________________________________
Subject: ASSY : LowHighProfile
Author:  Non-HP-jmcgee (hp.com!simon.ipc.org!pbni.attmail.com!pbn!pbn1!jmcgee) 
at HP-Singapore,mimegw19
Date:    7/19/96 8:41 PM




What is the difference between a Low profile and a High profile surface 
mounted device?

In IPC-A-610B (section 10.2.5.5), I see that QFPs and SOLs are considered 
High profile and that SOTs and SOICs are Low profile.   It's the "etcetera" 
that
I'm finding unclear.

In other words, what is the measurement characteristic that differentiates 
the
High from the Low profile?  Is it a specific measurement from the seating 
plane to the bottom of the device body?  To the top of the device body?
To the point where the leads enter the device body?  If any of these, what 
is the distance?  Where can I find this info?

Profile me much obliged.

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