TECHNET Archives

1996

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
Poh Kong Hui <[log in to unmask]>
Date:
Fri, 14 Jun 1996 00:24:33 +0800 (SST)
Content-Type:
text/plain
Parts/Attachments:
text/plain (37 lines)
Dear Technet,

I am encountering an issue with a multi-layer board, that the solder side of
the 
board is being masked & plicked as to prevent vacuum leakage during ICT testing.

However, there is solder in the via-hole on the component side of the board.
As a result, the solder in the via-hole is being pushed out of the via-hole
as a 
solder ball, either during the reflow stage/ wave-soldering process when the 
board hitted on the wave.

This has resulted lot of solder short, unsoldered joint on the SOIC due to
some balls 
trapped underneath the component, had lifted up the component's lead away
from the solder pad (stuck in-between the board and the component).

I would like to let all these boards to undergo the reflow process as to get
rid of the solder in the via-hole, but , is there any other ways to :-

1.      resolve this issue temperary,

2.      and also a permenant way.

Lastly, I would like to know how this happens during PCB being fabricated,
and how
the PCB manufacturer is able to prevent solder entrapped in the via-hole
.

Thanks in Advance..

Poh Kong Hui
Nera Electronics
Email: [log in to unmask]



ATOM RSS1 RSS2