Very good questions asked by Michael regarding the future of small vias in
PCBs. This is a very important subject. One key driver is the entrance and
rapid evolution of Chip Scale Packaging (CSP)  These new minimalist packages
will require such small vias (and also finer lines). The interesting thing
about these new package formats is that they will probably be, at once, both
the highest performance and the least expensive packages for ICs. Projecting
the impact of the packaging to the PCB, it is clear that they will probably
be more expensive per unit area but less area will be required for
interconnection. Key to enjoying those higher profits is good process
control. Excepting the need for leasehold improvemnts such as clean rooms, it
is reasonable to argue that it costs no more to produce a one or two mil line
than it does to create a ten or twenty mil line. The materials avialible
today are clearly process capable as evidenced by those among us who produce
such products daily. The net effect of the finer lines and smaller holes
should be that the boards will be less costly, per function, to the OEM and
thus to the end user. What will have to be tossed out are the tired and dated
concepts of fixed costs per unit area and the deeply entrenched "buyers
mentality" which we, as an industry, seem to collectively nurture. There will
be need for a concerted effort at re-education to transform buyers into
"technology procurement specialists" who truly understand the dynamics of
these changes.
A continuing dialog on this subject, "to argue it out",  is invited and
encouraged...

Cheers,
J. Fjelstad