If you are using PADS software you can run ECOGEN.EXE.  This will compare two PADS 
netlist files and give you a difference file.  So you could compare the first schematic 
netlist with the last PCB netlist.

I always keep a schematic file after every change that is made during the PCB layout 
process.  Just in case

Good Luck
Mark Bartlett
Harmon Industries
[log in to unmask]


Doug Brooks wrote:
> 
> We are an independent Service Bureau
> 
> A year ago we completed a board for a customer. The board had
> roughly 7200 individual nodes. Recently the customer asked
> us to incorporate revisions affecting approx 500 of those nodes
> (some parts deleted, several new parts + other changes.)
> 
> Revisions are, of course, dynamic, so we received approx 4 up-dated
> net lists during the process. The problem is that he had numerous
> unnamed nets. The schematic capture system would assign random names
> to those nets each revision. Our system doesn't care if names change
> as long as the integrity of the overall net list is preserved.
> 
> When we gave him the check plots he asked us for a printout of
> just the changes, presumably so he could check just those. Since
> most of the nets were renamed several times,
> we didn't see how we could meet his request, but he insists that we
> should be able to.
> 
> So I'm looking for your input.
> 
> 1. Isn't it the engineer's job to keep track of changes if he wants an
> audit trail?
> 
> 2. And isn't our job to implement them and create a design that matches
> the netlist that he says is the final and correct one, but not to maintain
> his audit trail of changes? (in particular, a "net-diff" list from two
> net lists with randomly assigned net names?)
> 
> 3. If a schematic capture system assigns names to the nets, isn't there
> a way to fix those assignments and make them permanent?
> 
> I'm not looking for sides, here, but a way to see this problem coming
> and be able to solve it next time.
> 
> Thanks for any input
> 
> Doug Brooks
> 
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