On 24 Sep 96 at 9:57, [log in to unmask] wrote:

 >I was thrilled when the subject of thermal vias vs. direct-connect
 >vias came up, because we were just discussing whether we should "go
 >direct" last week. After reading all the responses... well, I'm just
 >a little worried about it. Rather than quote everybody, here is a
 >summary of what my boss will read if I show him this discussion:
 >
 >Two people, K.Barret and [log in to unmask], have used direct connections
 >extensively, in all environments, all sizes, varied layer count, no
 >problems. (and one ships about a million boards per year to prove
 >it)
 >
 >B.Luthor concerned about heat transfer to plane, one reply stated
 >trace from SMT pad to via was a thermal in itself. (I would tend to
 >agree on that one)
 >
 >One side discussion about a PINK RING problem, without enough
 >explanation to learn how pink ring would affect a board or how it is
 >related to direct vias.
 >
 >Another side discussion about clearance vs. fab allowance, and
 >another about reduced clearance (anti-pad) sizes. Won't affect our
 >decision.
 >
 >A warning from Norm about CTE mismatch and the danger of board
 >damage if direct connections are used.
 >
 >One reminder from G.Ferrari about the value of formal test
 >procedures and a warning that what works for one design may not be
 >appropriate for others.
 >
 >-=x=-
 >
 >Thanks to all who participated, this thread came along at the
 >PERFECT time. Our board vendors don't care WHAT we do, so it is up
 >to us. But before I go show this to others and we make the decision,
 >are there any other issues that got left out?  any elaboration
 >necessary?  any final comments?
 >


 Let's not forget about the main issue here. All the RF engineers
I have worked with have demanded direct connects for the higher
performance they provide. (a lower inductance connection to the
plane and less "swiss cheese" effect). As we increase switching
times in our digital logic families, digital engineers will want
these benefits on power connections.

 Of course, a lot of RF engineers are also notably callous toward
the complaints of manufacturing folks. In the RF world, the benefits
far outweigh the negatives.

 An old rule of thumb on the heat sink issue is that the via should
be connected with a wire 10 mils or less wide, and 10-15 mils long,
far away enough from the SMT pad to have a good solder mask "dam"
preventing solder from the land flowing into the via.






  

---
Ross LaGue          < [log in to unmask] >          Dayton, Ohio

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