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1996

DesignerCouncil@IPC.ORG

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Subject:
From:
[log in to unmask] (Fred Pescitelli)
Date:
Thu, 20 Jun 1996 19:29:30 -0500
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All,
I don't see much discussion on just plane old design issues. I thought I
would throw out a few topics and see if anybody is interested in discussing
them. I am crossposting this to Pcad users and IPC Designers Council.

Has anybody been using SMT Plus land patterns? They are advertising a lib.
for P-Cad. How do they compare to the IPC 782 Patterns?

What are you doing as far as via's and conductors under SMD components? I
noticed the P-Cad lib has keepouts under the chip components. I have been
routing traces under SMD and have not had any problems.

Has anyone needed to provide a glue dot file for mfg? I noticed that P-Cad
has that capability but I have never had to provide one in the past. It was
always created from the placement file.

Silk Screen legend sizes seem to be very large on most commercial lib's
compared to what I have been using. I seem to get away with .008 width and
sometimes down to .060 height. What is your experience?

I have just finished a Design for a client that demanded that all components
be orientated in the same direction and also all of them lined up, nice and
neat. Great idea if I would have had twice the board area to work with. I
know the desireability of this but I also like to think form follows
function. Many of the original reasons for doing this are obsolete. The
board is finished now but I just know placing the parts for optimal routing
would have resulted in much shorter runs, and a more functional layout. What
is your opinion? How are you doing it?

I also was prohibited from putting chip caps on the solder side, even though
I routinely do it with other designs. Are any of you designing boards that
are waved with chip caps on the solder side?

Regards
Fred Pescitelli
Phoenix Designs
1285 Turner Rd.
Lilburn, GA   30247
[log in to unmask]
770-923-3465



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