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From: | simon.ipc.org!uunet.uu.net!zytec!owl!patb (RwF - ext. 355 - Pat Bailey) |
Date: | Mon, 9 Dec 96 10:08:28 CST |
Content-Type: | text/plain |
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Greetings TechNet:
I have some questions regarding acceptability of exposed copper. For
example, if I have a large ground area that has some spots where the
soldermask is thinner and the underlying copper shows through, is this
acceptable? I have in the past been of the opinion that if it did not coat
over with solder in either the HASL or wave solder processes, then it is
not exposed copper and should be acceptable.
Similarly, if the soldermask gets scratched or flakes in a small area
(truly exposed copper), is this acceptable? I believe IPC-A-610 says this
is non-conforming for both Class 2 and 3, but to me this is more of a
process indicator that does not affect form, fit, or function. Also, how
are OSP coated boards handled in terms of acceptability of exposed copper?
I would appreciate any input, either from IPC or other users. Thanks in
advance.
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