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Date: | Thu, 8 Feb 1996 14:29:44 -0600 (CST) |
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Dr. Charles Jennings, Sandia Laboratories, presented his paper "Printed
Wiring Board Process Study" at the 18th Annual Meeting of the IPC in
April 1975. It was published under the technical paper number IPC-TP-56.
It is available for $5 to members, $10 to non-members. Call Latesha or
Jean to order at (847) 509-9700 extension 318.
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Lisa M. Williams
Technical Staff
IPC
2215 Sanders Road
Northbrook, IL 60062
phone: (847) 509-9700 x 379
fax: (847) 509-9798
email: [log in to unmask]
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---------- Forwarded message ----------
Date: Wed, 7 Feb 96 08:28:54 EST
From:esvax::mrgate::a1::[log in to unmask]
To: [log in to unmask]
Subject: RE: HI pot between surface features.
From: NAME: WILLIAM G KENYON
FUNC: Chemicals/Electronics
TEL: 302-652-4272 <KENYONWG AT A1 AT ESVAX>
To: NAME: [log in to unmask] <"[log in to unmask]"@ESDS01@MRGATE@ESVAX>
Some of best work in looking at voltages & clearances was done by
Dr. Charles Jennings at Sandia Labs. This work was the basis of
setting the voltage/conductor line spacing for mil. work. The
paper was given at IPC, published by them, may have even been in
the IPC Tech. Review. Check with IPC HQ for a copy.
W. G. Kenyon
Global Centre for Process Change, Inc.
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