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Date: | Fri, 07 Jun 96 16:15:28 PST |
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We are manufacturing military multilayer circuit cards with via holes
in the smt pads, unless they are filled prior to mounting components,
they affect the reflow process in an uncontrolled manner, producing
random solder joints with insufficient solder volume.
Is there a know process for either plating shut (not my choice)or
filling the vias during the pwb fab process, of is there a known
process for controlling the travel of solder down unfilled vias that
remain in the compontent pads such that there is less variability in
the finished solder joint volume?
Thanks, [log in to unmask]
Neal Preimesberger at Hughes Missile System Co. Tucson AZ.
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