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| From [log in to unmask] Thu Mar 28 11: |
33:21 1996 |
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In speaking one on one with Deiter Bergman at the "PCB DESIGN CONF" he
enlightened me on this subject. Apparently, the larger pads (hence greater
solder volume at toe fillet) on the larger 'ceramic' chips was creating
too large 'in-plane' loads on the component during temp cycling. At least
that was my understanding of the mode of failure exhibited.
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