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| From [log in to unmask] Mon Dec 23 12: |
02:54 1996 |
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by ipc.org (Smail3.1.28.1 #2)
id m0vaV1d-0000SHC; Wed, 18 Dec 96 17:03 CST |
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Steve Gregory's reply indicated that design could be a
contributing factor in tombstoning. If the issue "could be"
etch entry, I have some questions.
In high-speed and high-power realms, there is genuine merit
to increasing supply and return etch widths to the largest
possible sizes. In a SMOBC environment, we are hoping that
heat-sinking due to large etch widths is not a significant
factor.
If I think a moment (gear oil's kinda thick today), we in
design try to consider the purpose of a connection and react
accordingly. Could some assembly folks confirm techniques,
assuming a SMOBC board and "adequate" spacing to the nearest
connected via?
* Wave soldered:
- Minimal impact of trace exit size.
* Reflow soldered:
- Chip components are okay if both leads have heavy etch
- (ie decoupling caps or power supply/filter circuitry)
- Termination and pullup/down components (signal one end, pwr
- or gnd the other) should have minimized power/gnd etch width
- Fine pitch IC's are okay as long as trace fattening happens
- underneath soldermask
- BGA fanouts should be sized for pwr/gnd and uniform across
- the entire part
- Soldermask defined pads (land embedded in copper plane) can
- be done *when nescessary* with some amount of pain
Here's hoping everyone's packing rubber bullets today, thanks
in advance.
--
Jeff Seeger Applied CAD Knowledge Inc
Chief Technical Officer Tyngsboro, MA 01879
[log in to unmask] 508 649 9800
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