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From [log in to unmask] Mon Feb 26 12: |
40:07 1996 |
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Many OEM users have demonstrated that exposed copper in the assembly
does not pose any reliability problems, in fact, this has been going on
for over 10 years (with OPSs). Obtaining actual reliability data from
these OEMs is more difficult.
PCBs have been manufactured for years with electrolytic tin or gold as
the surface finish. These boards contain a significant amount of
exposed copper along all traces, connectors, etc. The difference is
the copper cannot be readliy seen as it is located on the sidewalls and
not the board surface.
I have several years of experience working with customers converting to
the OSP surface finish. There are a number of things that can be done
to minimze the exposed copper, such as increasing the solder
paste stencil aperture to a 100% opening (most are about 80%), printing
paste on test points and vias as you suggested, minimizing through-hole
annular ring, etc. I find most customers accept exposed copper as it
is not detrimental to the final product. Of course, the product
application plays a role.
Working with the October Project, I've seen a couple of good articles
that may now be available through IPC. One good paper was a study done
by Batelle Labs with Digital Equipment Corporation -- it basically
concluded that bare copper was more reliable than solder down to a four
mil line and space.
Dave Boggs
Merix Corporation
phone (503) 359-9300
EMAIL: [log in to unmask]
Kaylor Karl <[log in to unmask]> Wrote:
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| We are contemplating using OSP's but in doing so will
| leave exposed copper
| on the final assembly. Specifically, the test points,
| fiducials and vias.
| We have discussed printing solder paste on the test
| points and fiducials
| but are not sure how it will affect test and the placement
| equipments vision
| system.
|
| What are the long term affects of leaving exposed copper
| in these areas?
| Does anyone else leave exposed copper on the final
| assembly?
| What affect will printing solder paste on test points and
| fiducials have on
| placement and test?
| How are assemblers dealing with this issue?
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| Any information would be greatly appreciated.
|
| Karl Kaylor
| Thomson Consumer Electronics
| [log in to unmask]
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