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Hello all,
I have a question on blind via which fill / partially fill with prepreg
resin during lamination. Assume an 8 layer board, blind via 1-6, SMOBC,
.062", standard in other ways....
ASCII Graphic
_______ _______ Copper Layer 1
xxxxxx|___A___|xxxxxx A = Copper Layer 1 in partially filled via hole
xxxxxx|xxxxxxx|xxxxxx
FR-4 | resin |FR-4 FR-4 "x" and plated via hole wall "|"
xxxxxx| blind |xxxxxx
-------x via x------- Copper layer 6
xxxxxxxxxxxxxxxxxxxxx
---------------------- Copper layer 8
In area "A", above, the resin fill does not go the the surface of the
board. This is a partially filled blind via, and is an acceptable
condition. However.... The surface of "A" is plated with electroless
and pattern plated. The electroless/plated copper has very poor
adhesion on the resin in the hole, and peels off in various subsuquent
processes, especially solder coat. I understand that the "fill" resin
surface is very smooth which causes the adhesion failure.
It is my assumption that this is a typical condition for "unfilled"
vias. Is this a vaild assumption?
Are there any situations when this condition poses is a problem?
Do others allow partially filled vias? IPC-RB-276 accepts a 60% fill
for buried vias, but silent on blind vias.
I know that others are trying to use this filled via construction as a
surface mount pad (God help you), what experiences do you have with
partially filled vias?
Thanks for the responces.
--
George Franck Jr
Raytheon E-Systems
Product Assurance Engineer
Falls Church Va
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