Mail*Link(r) SMTP FWD>EMI and micro switching induced noise
Carey,
In addition to what Jeff mentioned below:
At the desired attenuation levels you're after, the impedance and length of
the ground connections are critical. A ground (or any other) conductor's have
a variable impedance as a function of length and frequency, think of the
power/ground conductors as fractional wavelength antennas, this is
particularily critical for ground loops in cascaded voltage/power amplifiers.
The ground loops for your circuitry may be different for your lower
frequencies than for you higher frequencies. This is due "cutouts" in the
power/ground plane system and frequency dependant impedances. This can give
you frequency selective feedback/coupling into the cascaded amplifier stages.
As Jeff mentioned, the separation (gap isolation or split) between
power/ground planes must be complete -- use the "chain-saw" approach through
all conductive pattern layers, try to obtain at least 2-3 mm of spacing
between sections; have no power/ground plane overlaps. To achieve the design
requirements level of isolation, every pF and fF of stray coupling capacitance
counts.
In a couple of designs, we've had the luxury of placing all of the noisy stuff
on one side of a SMT assembly and all of the quieter stuff on the other side,
with minimal interconnects between sides of the assembly. We have also
"burried" all of the more critical signal conductors under a (signal) ground
plane, that is lands only outer layer, signal ground plane, critical signal
conductors, another signal ground plane, etc..
We also use small "good" rf ceramic bypass capacitors (porcelain/glass) as
close as possible (<2 mm) at the power terminals and then lead out to larger
bypass capacitors for lower frequencies. The bypass capacitor's conductor
lengths must be routed to accomodate the signal current loop path, and not
where it is convenient to place/ground/connect the capacitors. This is a
variation of the KISS statement "keep it short stupid", we use this statement
a lot, follow your nose and keep it on the path of the maximum (signal)
current flow.
Make sure the signal path and the signal's ground path are superimposed, using
good transmission line design practices, even if you have components in series
with the signal conductors path.
If you're locked into a single-sided assembly, I suspect (as Jeff mentioned)
you'll need to use a well grounded shielding cover.
Hopefully the design is not "high-power" because if you've got magnetic field
coupling in addition to the E-field, it going to be significantly more
difficult to control/attenuate the H-field.
In the digital section, do you need a "nice clean square wave"????, sometimes
the "corners" and tr/tf (rise/fall times) can be rounded off and this reduces
the higher clock frequency harmonics. Perhaps you only need the 3'rd and 5'th
clock frequency harmonics and not all of the odd one's
I agree with Jeff --- mixed high-frequency stuff is FUN.
Hope it helps, good luck, and have fun with your current learning experience.
Ralph Hersey
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--------------------------------------
Date: 8/21/96 2:25 PM
From: Carey Ritchey/BURN/COM/AUGAT
Does any one have good references on multi-layer pcb design optimisation to
reduce micro switching noise pick-up.
We are operating a micro (switching speed 2 MHz) on a PCB with 72 dB of gain
in the 5 to 1000 MHz range and need to keep the noise pick to less than -90
dBm
we currently have achieved -75 dBm micro noise
From: Carey Ritchey/BURN/COM/AUGAT
<[log in to unmask]>
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>5 to 1000 MHz range and need to keep the noise pick to less than -90 dBm
>have achieved -75 dBm micro noise
Isn't mixed signal FUN? This is an area peppered with challenges.
I'll assume you're already doing the normal physical isolation
techniques, perhaps with a "picket fence", to achieve the 75 dBm.
Unlikely but possible you've got radiation above board, this can
be checked by making "covers" to try containing circuits in the
z-axis. This can often be done in the lab, even if it's kludgy
it will help rule out this coupling mechanism.
More subtle but in the same vein could be coupling across a gap
in the gnd plane (I assume you've got a split), the field effects
around the edge of planes can be such a coupling mechanism if you
have signals too close to the edge of the void, and/or the void is
too narrow. Possible fix for this is a "barrier" gnd, or small
web of gnd connected back to the pwr source "in between" the two
gnds you suspect of coupling. Farraday was right.
Often you get noise coupling through a power supply or return
path with inadequate isolation, particularly over such a sweep of
frequency.
I'd need alot more info to guess any further. Contact me off-line
and perhaps I could look at your database, depending on your plat-
form. Sorry, but I'm gone 'till Monday afternoon.
Good luck,
Jeff Seeger Applied CAD Knowledge Inc
Chief Technical Officer Tyngsboro, MA 01879
[log in to unmask] 508 649 9800
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