Received: |
by ipc.org (Smail3.1.28.1 #2)
id m0tk7Cg-0000DbC; Wed, 7 Feb 96 04:34 CST |
Old-Return-Path: |
|
Date: |
Wed, 07 Feb 1996 05:37:05 EST |
Precedence: |
list |
Resent-From: |
|
Resent-Sender: |
|
X-Status: |
|
Status: |
O |
X-Mailing-List: |
|
From [log in to unmask] Wed Feb 7 16: |
14:44 1996 |
TO: |
|
Return-Path: |
|
Resent-Message-ID: |
<"LG_SW.0.-KA.j086n"@ipc> |
Subject: |
|
From: |
|
X-Loop: |
|
X-Mailer: |
PRODIGY Services Company Internet mailer [PIM 3.2-334.50] |
Message-Id: |
|
Parts/Attachments: |
|
|
-- [ From: Doug Jeffery * EMC.Ver #2.10P ] --
Recently, I have been questioned about the use of a high pot test
between two adjacent surface conductors. What is the formula or rule
for potential between adjacent conductors in air..uncoated, (no
soldermask or confromal coat)?
Do the same rules apply as between two parrellel planes internal in the
board?
Should I expect an .010" space to provide a withstanding voltage of
1000 volts for 1 min.?
Given the surface must be free of ionic contaminates...
Thanks for the help..
Doug Jeffery
Electrotek
[log in to unmask]
|
|
|