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Mail*Link(r) SMTP FWD>FAB: RFI/EMI Vias
Hi Groovy Davy
As a rule-of-thumb, the size of the "mesh" should be less than 0.05 of the
shortest wave length of concern.
In the case of digital, another rule-of-thumb is the highest frequency of
major concern is about 10X the clock frequency.
Ralph Hersey
e-mail: [log in to unmask]
--------------------------------------
Date: 5/23/96 3:41 PM
From: [log in to unmask]
I have a customer who has asked me if I know about shielding vias.
I don't know much about these. All I know is that the size of the PTH
and the distance apart are based, somehow, on what frequency the
logic (PCB) is operating at. (Yessss?)
Now I don't have IEEE text books anywhere near this facility.
I'm a simple fabricator. Can someone who's savvy with RF <or even
Microwave> design give me some pointers to what kind of formulas are
used to determine this shield via barrier technique.
Thanks in advance for any and all replies.
Groovy
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Subject: FAB: RFI/EMI Vias
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