Received: |
by ipc.org (Smail3.1.28.1 #2)
id m0v64wp-0000STC; Wed, 25 Sep 96 20:09 CDT |
Old-Return-Path: |
|
From [log in to unmask] Thu Sep 26 11: |
05:59 1996 |
Precedence: |
list |
Resent-From: |
|
Resent-Sender: |
|
X-Status: |
|
Status: |
O |
X-Mailing-List: |
|
TO: |
|
Return-Path: |
<DesignerCouncil-request> |
Resent-Message-ID: |
<"4e8rg.0.WcM.kUTIo"@ipc> |
Subject: |
|
From: |
|
X-Loop: |
|
Message-ID: |
|
Date: |
Wed, 25 Sep 1996 21:17:33 -0400 |
Parts/Attachments: |
|
|
Ken ,
I hope you don't mind me riding your coattails, but:
1. We use 15 mils between SMT land and via pad (not edge of hole) this allows
for good reflow properties (minimizing tombstoning).
2. We also tent our vias with soldermask (LPI) to protect from solder flow.
3. As far as film goes do you trust your database? If you rely on the film to
tell if you did your job right than you should probably should keep using
thermals.
4. To my knowledge we have had no thermal problems due to absorbing vias into
planes (reflow and/or wave). If you aren't going to solder it why does it
need a pad? And even though we do lots of PCBs, I would caution everyone to
use good common sense and take a good look at what aspect ratios, end usage
and layer counts your personal needs are. Once again ask your Fabricators,
they probably have heard horror stories or happiness about this subject
(sorry if you are captive).
I hope this helps and will offer to talk to anyone with more questions
either via E-mail at [log in to unmask] or on land line at (916) 353-5366 from 7am
till 3pm Calif time (my day job).
****************************************************************************
* The mail list is provided as a service by IPC using SmartList v3.05 *
****************************************************************************
* To unsubscribe from this list at any time, send a message to: *
* [log in to unmask] with <subject: unsubscribe> and no text. *
****************************************************************************
|
|
|