DESIGNERCOUNCIL Archives

1996

DesignerCouncil@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Condense Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Mime-Version:
1.0
Content-Type:
text/plain; charset=us-ascii
References:
Date:
Sat, 13 Apr 1996 23:07:40 -0700
Precedence:
list
Resent-From:
Resent-Sender:
DesignerCouncil-request [log in to unmask]
Content-Transfer-Encoding:
7bit
Status:
O
From [log in to unmask] Mon Apr 22 15:
43:23 1996
TO:
Ed Current <[log in to unmask]>
X-Status:
Return-Path:
<DesignerCouncil-request>
X-Loop:
X-Mailing-List:
<[log in to unmask]> archive/latest/1602
Old-Return-Path:
Received:
by ipc.org (Smail3.1.28.1 #2) id m0u8rnX-0000ARC; Mon, 15 Apr 96 12:10 CDT
Resent-Message-ID:
<"CMNDQ2.0.HOJ.ICeSn"@ipc>
Subject:
From:
Jack Olson <[log in to unmask]>
Cc:
"'ipc'" <[log in to unmask]>, "'ipug'" <[log in to unmask]>
X-Mailer:
Mozilla 2.0 (Win16; I)
Organization:
Circuit Packaging and Layout
Message-Id:
Parts/Attachments:
text/plain (58 lines)
Ed Current wrote:
> ...I was hoping someone could help me with the trade offs of plating 
>    FR4 at higher copper thicknesses. 

A few brief notes from the top of my head (although I'm no expert and 
would like to read a response from a board fab guru...)

>From my experience, The biggest trade off is etching consistency. If you 
have a design where one area is large copper traces/planes/polygons, and 
another area has circuitry with small traces like 8mils, you may see the 
"thin" side get over-etched. It is harder to control the etching of thick 
copper and keep the "walls" of the trace squared-off. (Have you heard of 
undercutting? the trace cross section looks kind of like a mushroom.) 
Anyway, if you use thin traces, you might want to put thieving copper 
around them.
Another trade-off is that there will be more plating in the holes, and if 
the board house doesn't compensate for it with a larger drill, your 
finished holes may be on the small side; might want to use slightly large 
holes for through-hole components. Small vias can be a plating problem, 
especially if the "power" board needs to be .093 or .125
Check with your vendor before you just assume they have what you need. 
Most of them don't stock 4oz (haven't even heard of three oz), and you 
might lose a day or two if they need to order it. Also, make sure they 
know if you are calling out a material when you say 4oz, or if you mean 
you want the finished thickness (after plating) to be at least 4oz.


>    How much current can each oz carry for various widths?

Each ounce can carry the same amount as the other ounces (just kidding)
This is not so easy to answer, which is why there is a handy chart with 
curves for different temperatures and copper thicknesses. (you also have 
to know at what temperature (over ambient) that the board will be running 
at). For any amount of current between 0-35 amps, you find how many 
square mils of copper you need on the appropriate "temperature" curve. 
Then you use the square mils on the appropriate copper thickness curve to 
get the trace width. It is published in most design books and in 
IPC-D-275, but if you can't find it I can scan it and shoot it over as a 
BMP or GIF or whatever.
P.S. Keep in mind that small nicks in traces, and +/- 5-10% tolerance on 
trace width is acceptable, so adjust the width UP to cover your a**.


NOW I HAVE A QUESTION:

As an example, say I need 5amps and 20 degrees over ambient is a safe 
assumption. The chart gives ABOUT 100 square mils, which corresponds to 
ABOUT a 75mil trace width on the 1oz copper curve.

OK, how many of you use 75mils? How safe is this number? Should I use 
100? Is there a rule of thumb for "being on the safe side"? Please don't 
quote this entire message if you want to answer... in fact, if you want 
to answer privately I could summarize in a single post.... Thanks in 
advance,
							Jack



ATOM RSS1 RSS2