>      Does anyone know of good references for determining the maximum 
>      current carrying capacity of traces of different trace widths and 
>      copper weights.  I've seen the tables in IPC-D-275, but am looking for 
>      more extensive information.  I'm also interested in knowing if there 
>      are empirical equations describing max current.

Check Printed Circuits Handbook (Clyde F. Coombs) or Microelectronics
Packaging Handbook (Tummala, Rymaszewski).  MPH has the most detailed
information on modeling surface trace thermal properties.  Like any heat
transfer problem, the results will vary widely, depending on the
assumptions that you chose to make. 

>      Additionally I need to know the same information for vias.  For a 
>      given hole size and minimum plating thickness what is the maximum 
>      current carrying capacity of a via.  Is this affected by the use of 
>      thermals on power and ground layers.  Is this affected by whether the 
>      via is bare copper, HASL coated, or solder filled?

Sorry, I don't have any good sources on vias.  HASL coating will
probably make little difference, solder filling would be a big
improvement.  You could probably model an unfilled via as an equivalent
trace without too much error. 

-Jeff Deeney-
Hewlett Packard Company
Computer Interconnect Operation