Tim,
IPC has contracted with Drake Prometric to administer the test. They have
sites across the U.S., but they change rapidly so Drake does not provide
IPC with addresses. On the last list I saw, there was a Drake site in
Huntsville. Call 1-800-895-EXAM to get the exact address.
The self-study guide is not yet available. I hope it will be published
and available in January. And, unfortunately, I do not know the price.
The workshop is a Certification preparation class. It reviews the
objectives of the exam and shows where to find the applicable information
in the guidelines and standards (IPC-T-50, IPC-D-275, IPC-D-325,
IPC-SM-782). Additional study time is required to pass the exam.
Some of the ideas regarding "how designers can prepare" that have been
floating around the IPC are Designer Council study groups. Pick an
objective for a study topic. Designers can research, share, and discuss
guidelines and standards that relate to that objective. And with one
person who has been to the workshop to help, it should be a profitable
experience for all.
Now to answer your question as to the availability of materials: I
don't know if they are available. Perhaps Dieter Bergman, who I have
copied, can answer that question.
If you do not already have a list of the objectives for the series of
exams, I have included them for your studying pleasure.
****************************************
Lisa M. Williams
Technical Staff
IPC
2215 Sanders Road
Northbrook, IL 60062
phone: (708) 509-9700 x 379
fax: (708) 509-9798
email: [log in to unmask]
****************************************
OBJECTIVES BY CERTIFICATION LEVEL
1 - LAYOUT REQUIREMENTS
LEVEL A
1A.1 Describe the characteristics of a grid system.
Goals: Define what a grid system is
Define grid relationship to component placement
Define grid relationship to conductor routing
Define how a grid is located
1A.2 Define the purpose of tooling holes.
Goals: Recognize importance to Fabrication
Recognize importance to Assembly
Recognize relationship to feature size/location
Describe the hole to pin relationship
1A.3 Describe features which can be formed in copper on a substrate.
Goals: Identify lands and land shapes, functional/nonfunctional
Identify holes for lands and thermal relief concepts
Define conductor geometry's and planes
Identify symbols and designators
1A.4 Define through hole land requirements and tolerance restrictions.
Goals: Determine minimum annular ring
Demonstrate ability to calculate land size
Explain worse case land to hole relationship
Explain unsupported hole principles
1A.5 Define design differences for use in surface mount vs through hole.
Goals: Define attachment differences
Describe the amount of land area needed
Define solder joint characteristics
Define manufacturing allowances
1A.6 Identify the interrelated considerations (i.e. use environments, maintenance,
installation) necessary to accomplish a formal layout.
Goals: Identify items in a design check list
Define design team purpose, prior to layout
Illustrate awareness of end use environments
Identify maintenance requirements on layout
1A.7 Describe the viewing principles for a printed board with parts mounted on both
sides.
Goals: Identify primary side and datum planes
Describe layer assignment concepts
Differentiate conductive/nonconductive layers
Identify purpose of legends
LEVEL B
1B.1 Apply design standards to meet manufacturing and assembly goals.
Goals: Recognize manufacturing and assembly cost trade-offs
Identify characteristics for robust assembly
Illustrate check list for high first pass yields
Demonstrate use of applicable standards
1B.2 Identify PCB design compatibility with manufacturing processes.
Goals: Describe manufacturing allowance principles
Define the maximum board size relationship
Identify board to panel compatibility
Describe "over toleranced" conditions
1B.3 Identify considerations to be taken into account when doing a fan-out.
Goals: Identify the principles of fan-out for testing
Describe the principles of fan-out for assembly
Identify the principles of fan-out for routing
Define the principles of fan-out for rework
1B.4 Relate decision process for selecting board types.
Goals: Describe type 1 board manufacturing process
Describe type 2 board manufacturing process
Describe type 3 board manufacturing process
Describe type 4 board manufacturing process
1B.5 Describe the allowances needed when using cutouts and notches.
Goals: Identify cost sensitive notching conditions
Detail other fabrication processes impacted
Describe tolerances necessary for board routing
Describe tolerances required for blanking
1B.6 Distinguish complete description of parts, quantities, manufacturers code, and
special ordering instructions from an engineering provided material list.
Goals: Describe the purpose of using standard components
Describe the reason for having a complete part list
Describe difference between standard/nonstandard parts
Explain who and why the parts list needs approval
1B.7 Organize layout by function, confine analog and digital circuitry to designated
areas, to minimize cross talk and simplify testing strategies.
Goals: Explain importance of test personnel involved early in layout cycle
Explain the need for all node testing
Describe crosstalk between analog/digital circuitry
Explain power distribution for both analog/digital circuitry
1B.8 Employ the use of a unit of measure program in completion of a physical layout.
Goals: Explain method to measure time for schematic data entry
Define method for manual/automated routing completeness
Define post processing procedures
Relate engineering approval control system
1B.9 Apply panelization strategy.
Goals: Define basic panel sizes
Explain how to calculate correct panel size for a given board size
Explain the need for a fabrication allowance on the panel
Describe the cost trade-offs between various panel sizes
1B.10 Employ conductor routing strategies and geometries.
Goals: Illustrate routing strategy to "connect the dots"
Compare conductor routing and placement grids
Describe advantages of 45 and 90 degree routing strategies
Describe conductor routing method with no apparent pathway
1B.11 Explain four layer multilayer design techniques.
Goals: Discern inner layer exclusion areas
Demonstrate by-pass capacitor routing techniques
Illustrate proper unsupported hole design in a four layer board
Define inner layer land size, for thermals and vias
LEVEL C
1C.1 Assess the need for using a modular grid system.
Goals: Explain use of typical features that define a grid
Explain why certain features require grid to control their location
Explain the typical grid system for through hole design
Explain the typical grid system for surface mount design
1C.2 Develop standardization strategy for manufacturing and assembly goals.
Goals: Explain the need to standardize board sizes through fabrication
Explain need to standardize board sizes through the ass'y process
Explain the need to control bow and twist
Explain the need for bare board/assembly test
1C.3 Make a density evaluation.
Goals: Identify the characteristics to use in a density analysis
Explain why density evaluations are important
Explain what constitutes a usable board area
Explain what constitutes the component area
1C.4 Differentiate board type selection based on end product performance.
Goals: Define item check list of properties to make board selection
Explain why items on check list are appropriate
Explain the need for test considerations on check list
Explain why analog/digital placement should be considered
1C.5 Develop strategy for blind/buried via technology.
Goals: Explain the fabrication processes for blind/buried via technology
Describe the difference between blind and buried vias
Explain the cost difference between blind, buried and through hole
Explain hole size differences for blind, buried and through hole
1C.6 Differentiate between physical layout requirements for digital and analog (A/D)
circuits.
Goals: Explain the difference between analog and digital circuitry
Explain "state information"
Explain "wave form characteristics"
Explain the physical layout for power distribution for A/D circuits
1C.7 Develop the strategy to incorporate a units of measurement program.
Goals: Explain the purpose of a quoting matrix
Define techniques for CAD operator efficiency
Determine on the job training ,time and schedule of completeness
Define board type, standard routing system capability (4, 6, 8 layer)
1C.8 Translate tooling requirements for individual board design.
Goals: Define tooling output which aid fabrication process
Define tooling output which aid the assembly process
Define tooling output which aids testing (bare board/assy)
Define the need for artwork overlay's
1C.9 Develop strategy for interrelated design considerations (i.e. use environments,
maintenance, installation) to accomplish a formal layout.
Goals: Identify the temperature ranges for end use environments
Establish throw away concepts related to cost of repair
Determine different packaging densities based on repair vs discard
Establish principles for "take back" equipment regulations
1C.10 Establish the relationship between inch based and metric grids.
Goals: Define the round-off methods for conversion of inches to metric
Explain the method of using two grid systems on the same design
Explain methods for placement /routing to accommodate both grids
Determine resolution importance in round-off or off-grid principles
1C.11 Differentiate the criteria used when selecting between single sided and double
sided test.
Goals: Identify testability design checklist criteria
Determine cost trade-offs and contributors to cost
Define design requirements when single sided testing is mandatory
Identify testability design check list
1C.12 Generalize op-amp placement and routing techniques.
Goals: Develop placement guideline for a single op-amp
Develop placement guideline for quad op-amp
Analyze conductor routing strategies for an op-amp
Identify why routing around an op-amp is important
1C.13 Formalize preferred power and ground routing techniques.
Goals: Identify DC power return and AC reference plane
Define a power structure with proper decoupling techniques
Detect load and source
Design a preferred tree
LEVEL D
1D.1 Specify the design standardization requirements to meet manufacturing and
assembly goals.
Goals: Define std manufacturing panel for a variety of board sizes
Define the relationship of the fabricated panel to the assembly
panel
Identify minimum features for fab/assy (fiducial, tooling holes etc.)
Identify keep-out or process control coupon areas for fab/assembly
1D.2 Establish a standardized tooling system to include tooling for fab, bare board test,
assembly and in-circuit test.
Goals: Identify team members to establish a comprehensive testing system
Define tooling methods (e.g. translation plate) used in testing
Define methods to coordinate various vendor test strategies
Define the CAD tooling method interface necessary for data
transfer
1D.3 Identify vibration considerations in pre-layout phase of design.
Goals: Define complex vibration analysis and when required
Define observations to eliminate vibration induced failures
Define the need for supporting free standing components
Define when stiffener bars should be used in a design
1D.4 Formulate the mission statement for the interrelated considerations (i.e. use
environments, maintenance, installation) to be incorporated into a design.
Goals: Identify verbiage to obtain commitment of different disciplines
Develop standard review and approval procedure
Develop mandatory use of specific standards plus deviation system
Develop a check list to ascertain that all issues are addressed
1D.5 Develop the units of measurement program.
Goals: Determine the constituents of a unit of measurement program
Establish the "matrix" necessary to determine a design budget
Correlate design decisions to a method of determining product cost
Establish cost trade-offs between fabrication and assembly
1D.6 Develop a universal computer based placement strategy
Goals: Define component and component family rules and handling
Develop techniques to identify improper placements
Distinguish mechanical restrictions for different product types
Define checks to insure electrical performance requirements
2 - ELECTRICAL CONSIDERATIONS
LEVEL A
2A.1 Transform a schematic/logic diagram in manual or automated format into an
interconnected arrangement of electronic components.
Goals: Identify commonly used schematic symbols
Show placement with maximum component outline shown
Explain use of "rat-nest" in using an automated system
Explain the "paper doll" placement strategy
2A.2 Define electrical standard schematic and logic symbology.
Goals: Define the symbol for a three input Nand gate
Describe the reference designator coordinate assignment system
Define when a connector is a "P" or "J" designator
Describe the need for defining sub assemblies and their symbols
LEVEL B
2B.1 Characterize electrical clearance for voltages used in different environments, at
various altitudes using spacing table.
Goals: Define why similar clearances are used for different voltages
Determine surface and internal electrical clearance conditions
Define difference/similarity between conductor and part clearances
Describe conformal coating/soldermask reqmt to prevent spark-over
2B.2 Interpret conductor thickness requirements for various currents with minimum
temperature rise using standard current carrying capacity chart.
Goals: Explain the curves in fig 3-4, conductor thickness and width
Define the derating factor for double sided and multilayer boards
Define lowest temp. rise for particular conductor width / thickness Identify high copper thickness performance parameters
2B.3 Identify electrical clearance for coated and uncoated boards and assemblies at any
elevation using spacing table.
Goals: Interpret table 3-1 for electrical conductor spacing
Identify high altitude parameters that cause corona
Define conditions of moisture that impact spacing requirements Determine differences between conformal coating and soldermask
LEVEL C
2C.1 Interpret conductor thickness requirements for various currents with minimum
temperature rise using standard current carrying capacity chart.
Goals: Define the requirements for power supply boards
Establish temperature that a family of printed boards has on a system
Define needs of analog boards used in communication hardware
Define methods for cooling circuitry as opposed to components
2C.2 Identify schematic correctness for capacitance polarity requirements or need for
pull-down resistors.
Goals: Define methods for checking (Check list) electronic diagrams
Develop a designers users guide for capacitor/resistor/diode usage
Establish component part to schematic symbol relationship (polarize)
Identify feed back loops in schematic or logic diagrams
LEVEL D
2D.1 Develop methodology for electronic schematic back annotation verification.
Goals: Establish time sequence in the design process for back annotating
Delineate gate swapping procedures, old/new reference designator
Develop documented procedure and obtain back annotation approval
Train personnel in the use of system procedures and software tools
2D.2 Illustrate comprehension of electronic design principles and functions, both analog and
digital.
Goals: Delineate electronic principles e.g.ohms law, resistance analyses)
Develop and document systems departmental training programs
Identify truth table relationship to logic functions
Analyze/convert boolean equations to logic symbology/part assignmt
3 - MATERIAL PROPERTIES
LEVEL A
3A.1 List the available types of copper clad laminate for subtractive printed board
manufacture.
Goals: Identify resin types
Identify reinforcement types
Identify thickness relationships
Identify glass fabric styles
LEVEL B
3B.1 Explain various board material and their properties.
Goals: Explain the difference between epoxy and high temp. laminate
Explain the difference between laminate and prepreg
Explain the difference between epoxy and high temperature prepreg
Explain documentation requirement details for material callout
3B.2 Relate the decision process for material selection.
Goals: Define laminate used for class 1 and class 2 printed boards
Define laminate used for type 3 printed boards
Define prepreg (similar or dis-similar) used for multilayer boards
Explain conditions when high temperature materials are required
3B.3 Distinguish material and properties used in board laminate construction.
Goals: Identify laminate approved by Underwriters Laboratory (U.L.)
Define requirements for unclad laminates
Define temperature constraints when selecting laminate
Describe how laminate thickness can be determined
3B.4 Apply materials based on end use environment.
Goals: Describe the cyclic temperature ranges for benign environments
Distinguish the variation of actual thermally severe environments
Distinguish the variation of thermally severe cyclic environments
Determine methods of cooling or heat transfer in various conditions
3B.5 Apply coatings based on end use environment and assembly technology.
Goals: Describe the different coatings available
Predict the capability of coatings to survive various environments
Differentiate the impact of humidity and temperature on coatings
Define the limitation/applications of metallic/nonmetallic coatings
3B.6 Determine proper metallic plating.
Goals: Identify metallic platings used in fabrication that stay with the board
Define the primary functions of metallic coatings
Describe platings used in the process as an etchant resist
Define those plating that are impervious to the environment
LEVEL C
3C.1 Identify the characteristics that influence material selection based on structural strength.
Goals: Describe bow and twist properties of various materials/thicknesses
Determine when stiffeners or bonded metal plates are required
Establish influence of board geometry, cut-outs and notches
Determine what CTE (copper-invar-copper) materials can provide
3C.2 Determine proper organic protective coatings.
Goals: Establish coatings used as a corrosion inhibitor over bare copper
Distinguish different coatings used as a moisture protective barrier
Distinguish between conformal and tarnish protective coatings
Determine documentation call-out on drawings (i.e. thickn's,cover)
3C.3 Identify conformal coatings and relate to purpose and preparation steps and special
handling.
Goals: Identify masking of connectors or open components for coatings
Identify coating area handling techniques/ assembly sequence
Describe impact of using vacuum conformal coating procedures
Determine compatibility with soldermask or other materials
3C.4 Categorize coatings based on end use environment and assembly technology.
Goals: Determine the use of coatings that can be easily removed for repair
Specify coating requirements for high humidity applications
Compare silicon,epoxy, polyurethane,acrylic,paraxylene coatings
Specify coating cure schedule to facilitate high temperature
3C.5 Identify the required conformal coating for a PCB.
Goals: Describe the use of selective coating of bare board techniques
Plan the assembly sequence to permit electrical test after coating
Develop strategies for masking and masking material removal
Document coating performance related to end- use environments
3C.6 Categorize material based on technologies.
Goals: Specify paper based phenolic performance and applications
Develop the criteria for use of exotic reinforcements (eg.kevlar)
Establish cost comparisons for copper clad base laminate materials
Classify environmentally friendly process consumable materials
3C.7 Categorize materials based on end use environment.
Goals: Derive materials list capable of low CTE properties
Specify reinforcements that restrict X & Y axis movement
Define materials that have good thermal properties
Document the need to eliminate lead in the assembly process
3C.8 Determine the minimum dielectric spacing between conductive layers.
Goals: Propose minimum dielectric separation for PCMCIA cards
Design and formalize a standard board family construction
Establish the test requirements for using a single ply core material
Develop auditing procedures that validate thin dielectric separation
3C.9 Distinguish important elements in constraining core boards.
Goals: Develop methods for clearance of PTH's in metal core (dielectric fill)
Classify materials by Gt (glass transition) temperature requirements
Plan the methods for designing balanced product (symmetrical)
Develop factors that call for incorporation of blind/buried vias
LEVEL D
3D.1 Develop the decision process for material selection for structural strength.
Goals: Compare specific component "G" load capability of various materials
Asses low cost materials, reinforced for structural strength
Formalize end-use to board size and thickness properties
Contrast cost difference thin mtl's with stiffener vs thick materials
3D.2 Develop the decision process for material selection based on process effects for specific
technologies.
Goals: Classify copper plating type and thickness by ductility requirements
Compare constructions that can survive several heat exposures
Validate the need for uniform plating surface characteristics
Contrast the performance of organic vs non organic materials
3D.3 Assess material usage per manufacturing process and cost effectiveness.
Goals: Document manufacturing processes related to decision cost models
Validate the need or use of soldermask and marking legend
Specify material properties needed for sequential lamination
Contrast the affect of cleaning process steps to material degradation
3D.4 Develop the decision process for material selection based on end use environments.
Goals: Define materials which provide long term temperature performance
Standardize end-use parameters for hand held equipment
Validate exposure to environment for office equipment
Classify material by application, e.g. aerospace, shipboard, space
3D.5 Develop the decision process for coating selection based on end use environment and assembly technology.
Goals: Specify coating requirements for swamp usage applications
Develop cost comparisons for selective vs total coverage coatings
Organize assembly process to permit electrical test prior to coating
Validate the need for or ,elimination of, conformal coating
4 - COMPONENT REQUIREMENTS
LEVEL A
4A.1 Differentiate between DIP vs SIP.
Goals: Identify Dual-in-line packages
Describe Single-in-line packages
Identify DIP/SIP impact on routing
Identify DIP/SIP impact on cost
4A.2 Differentiate between unclinched leads and clinched leads.
Goals: Define clinched leads
Identify impact of clinched leads on layout
Identify impact on solderability
Define when to use unclinched vs clinched leads
4A.3 Identify types of point to point wires.
Goals: Define bare point to point wires
Describe sleeved point to point wiring
Define insulated single strand point to point wire
Describe insulated multi-strand point to point wiring
4A.4 Describe difference between Surface Mount and thru-hole; axial lead and radial lead.
Goals: Identify characteristics of surface mount leaded device
Describe a thru-hole mount leaded device
Identify an axial leaded thru-hole device
Identify a radial leaded device
4A.5 Distinguish between DIP Socket and Chip Carrier Socket.
Goals: Recognize pin numbering of a DIP device
Recognize pin numbering for a Chip Carrier device
Describe layout impact with each choice
Define mounting requirements for J-leaded Chip Carrier
4A.6 Distinguish the difference between EDGE Board Connector, Card EDGE fingers, and
right angle connector.
Goals: Describe EDGE Board Connectors
Identify Card EDGE Fingers
Define Right Angle Connectors
Describe thru-hole vs surface mount Right Angle Conn. attachment
4A.7 Describe the construction and mounting characteristics of Bus Bars.
Goals: Define characteristics of a Bus Bar
Describe difference between single conductor and multi conductor
Define line width requirements for specified currents
Describe the primary use of a Bus Bar
4A.8 Define Do's and Don'ts of jumper wires on boards.
Goals: Identify proper documentation techniques
Define attachment techniques
Determine limitations of jumper wires
Define minimum spacing requirements for jumper wires
4A.9 Explain the purpose of stiffeners on PCB's.
Goals: Define electrical clearance for stiffeners
Define how stiffeners reduce board flexing
Determine the physical clearance requirements on and off the board
Recognize shock and vibration benefits a stiffener provides
4A.10 Identify the requirements for use of eyelets on PCB's.
Goals: Define the use of eyelets in new military designs
Relate the use of an eyelet as an interfacial connection
Describe under what circumstances an eyelet should not be used
Define the purpose of an eyelet
4A.11 Describe the difference between auto insert vs manual insert.
Goals: Define part orientation to facilitate auto insertion
Describe hole size differences for manual vs auto insertion
Define component mechanical clearances for auto insertion
Describe differences between discrete and I/C's in auto insert
4A.12 Describe the minimum information necessary to describe a non-standard part.
Goals: Describe a source control drawing
Define a specification control drawing
Interpret a vendor data sheet
Define methods of access for specification data sheets
LEVEL B
4B.1 Specify type of point to point wiring.
Goals: Determine use of point to point wires
Define placement methods for point to point wires
Identify proper attachment techniques for point to point wires
Define minimum electrical and mechanical spacing for wires
4B.2 Distinguish various component package types.
Goals: Identify case sensitive component packages
Describe component packages requiring thermal management
Define the need and use of polarized components
Identify component packages requiring lead forming
4B.3 Identify requirements for using clinched leads.
Goals: Define factors involved in using clinched leads
Describe spacing requirements when using clinched leads
Define the impact of clinched leads on solderability
Indicate application differences for clinched and uncliched leads
4B.4 Illustrate the impact of card edge fingers.
Goals: Define spacing requirements between contact fingers
Describe conductor routing restrictions
Define contact finger plating requirements
Describe contact finger electrical requirements
4B.5 Recognize when board stiffeners are required.
Goals: Define the board size that make use of stiffeners mandatory
Describe the various types of materials used to make a stiffener
Define shock and vibration benefit afforded by adding a stiffener
Define when to use fiber or plastic stiffeners
4B.6 Describe equipment specifications for manual and auto insertion.
Goals: Determine maximum board size requirements
Define insertion head clearances
Describe the purpose of the anvil and clearances necessary
Define minimum component to component spacing
4B.7 Define the methodology to obtain non-standard part information.
Goals: Define completeness required for specification control drawing
Detail methods for interpretation of a vendor specification sheet
Describe how missing part dimensions may be derived
Define importance of multiple sources for part selection
LEVEL C
4C.1 Explain the significance of connector uniformity in a multi-connector system.
Goals: Define the cost impact of using dissimilar connectors
Relate time factors involved in choosing and verifying connectors
Propose solution for selection of non available connectors
Define availability and cost differential of various connector types
4C.2 Document standard procedures for automatic insertion.
Goals: Define considerations for building an auto-insertable part
Describe insertion equipment anvil size and shape
Describe insertion head size and shape used in most equipments
Identify parts suitable for auto insertion
4C.3 Identify the advantages/disadvantages of point to point wiring on the layout.
Goals: Define cost considerations on assembly
Define layout procedure and implementation of point to point wires
Relate time constraints or benefits on layout completion
Determine degree of signal degradation when using wires
4C.4 Determine strategy for mounting different package types.
Goals: Define constraints imposed by special mounting requirements
Define analysis necessary to evaluate special mounting
Describe solder joint expectations for different package types
Identify cost considerations for assemblies
4C.5 Develop procedure for specifying clinched leads.
Goals: Identify various options for clinching description
Describe cost considerations on assembly
Determine impact on layout procedure
Describe documentation method for specifying clinched leads
LEVEL D
4D.1 Create procedure used in developing system level connector uniformity.
Goals: Describe cost impact of standardizing system level connectors
Describe cost avoidance of improper assembly of Std. connectors
Explain factors used in determining connector pin-outs
Demonstrate ability to choose connector types or families
4D.2 Illustrate methods of board extraction from mating connectors.
Goals: Describe types of board extractors
Define spacing considerations for extractors
Define special mechanical and electrical properties for extractor use
Demonstrate ability to choose proper extraction method
4D.3 Demonstrate the ability to select components.
Goals: Describe component selection procedures based on availability
Define component selection process from a cost prospective
Determine component electrical requirement to satisfy performance
Explain time consideration on layout completion
4D.4 Develop strategy for mounting different package types.
Goals: Extrapolate heel and toe fillets on a PQFP
Specify lead to hole ratio on different weights of thru-hole parts
Evaluate and document mounting strategies for a system
Relate package hole requirements to minimum hole aspect ratio
5 - ASSEMBLY TECHNOLOGY
LEVEL A
5A.1 Describe the difference between surface mount pick and place vs manual placement.
Goals: Define pick and place requirements
Define manufacturing tolerances for pick and place equipment
Describe tolerances for needed for manual placement
Define cost advantages of uniform part orientation for pick and place
5A.2 Define considerations for component mounting.
Goals: Define the need for physical support
Describe clearance requirements between conductive features
Identify heat dissipation characteristics
Recognize order of preferred part orientation
5A.3 Identify legend polarity markings.
Goals: Define differences between cathode and anode
Describe positive and negative difference for capacitor polarity
Describe connector pin identification and marking requirements
Identify various Integrated Circuit package polarity marking
5.A.4 Discern proper locations for legend markings.
Goals: Illustrate relationship of reference designators to components
Describe proper and improper use of pin 1 marking on I/C's
Specify line width for component outline
Define when part covered marking is permissible (eg. under socket)
LEVEL B
5B.1 Describe the minimum board support requirements.
Goals: Define the effect of mounting location on board stress
Describe the effect of mounting location on solder joint stress
Explain maximum hole diameter for unsupported component holes
Describe when external board support is required
5B.2 Explain attachment techniques for flexible cables.
Goals: Define different mounting methods for flexible cables
Describe mounting method effect on solder joint stress
Describe support methods used to reduce stress on solder joints
Define the degree of undue stress on flexible cable is detrimental
5B.3 Explain the assembly processes for different board types.
Goals: Define assembly of thru-hole components on one or both sides
Define assembly of SMT components on one or both sides
Describe assembly sequence of intermixed components; one side
Describe assembly sequence of intermixed components; two sides
5B.4 Transfer the assembly strategy to physical board design.
Goals: Define methods to assess application of assembly strategies
Identify the benefits of standardized component orientation
Describe a placement strategy to reduce assembly cost
Define when components require hand soldering (non-machine)
5B.5 Evaluate considerations for component mounting.
Goals: Calculate bend radius
Calculate lead spacing
Calculate hole size
Define physical support needs based on weight and heat dissipation
5.B.6 Distinguish board assembly type and class descriptions.
Goals: Define a Type I, Class A board assembly
Define a Type I, Class C board assembly
Define a Type II, Class B board assembly
Define a Type II, Class C complex board assembly
LEVEL C
5C.1 Describe Shock and Vibrations requirements in component mounting.
Goals: Define specific mounting approaches to reduce impact of S&V
Describe or determine end-use environments
Develop fixed or replaceable mounting techniques
Determine classification of reliability development test procedures
5C.2 Define the effects of copper balance on assembly process.
Goals: Describe the effects of bow and twist
Determine what constitutes unacceptable copper balance
Describe correction techniques for unbalanced constructions
Develop a strategy for internal copper plane balancing
5C.3 Calculate board size limitations for specific assembly equipment.
Goals: Describe method to determine assembly equipment capability
Recommend panelization for board assembly
Define the principles used for standardization at an assembly facility
Develop strategy for assembling small boards (eg. 25 x 25 mm)
5C.4 Develop an implementation strategy for assembly.
Goals: Describe sequence that components should be placed on the board
Describe factors used in a pick and place file
Define ways to lower the cost of the assembly operation
Define tolerance conditions for smooth assembly processing
5C.5 Determine component orientation based on assembly panel configuration.
Goals: Define I/C orientation intended to see wave solder exposure
Describe passive chip orientation for wave soldering
Indicate component arrangement preference to reduce cycle time
Define orientation relationship to facilitate pick and place thru-put
LEVEL D
5D.1. Specify the assembly philosophy regarding specific use of component type and families.
Goals: Describe thermal shock effects on components
Relate the cost of assembly to component selection
Describe differences between military & commercial specifications
Define methods of Type II, Class C complex assembly with Fine Pitch
5D.2 Exhibit knowledge of soldering techniques and resulting joint structure.
Goals: Relate the different soldering methods
Describe costs associated with each method, include set-up costs
Describe joint reliability factor associated with each technique
5D.3 Differentiate cleaning techniques and need for cleaning.
Goals: Relate environmental considerations
Distinguish cost factors involved in cleaning processes
Identify reliability factors, including shelf life potential
Define procedure for cleaning, electrical test, test for cleanliness
6 - BOARD FABRICATION
LEVEL A
6A.1 Explain board panelization.
Goals: Define the common panel size configuration
Define common separation between boards on a panel
Compare and contrast optimal panelization of fab and assembly
Define the common border size for fab and assembly
6A.2 Describe hole types; where and when they are needed and tolerances.
Goals: Explain the major influence on choosing a metric vs inch grid system
Explain the purpose of a through hole for component mounting
Explain need for tolerances, on size and location of a hole pattern
Explain MMC and LMC as applied to plated or unsupported holes
6A.3 Define various coatings and markings used on bare boards.
Goals: Define the documentation requirements for coating of bare boards
Define the layout requirements of bare board coating
Define the documentation requirements of marking of bare boards
Define the layout requirements of bare board marking
LEVEL B
6B.1 Define the effects of copper balance on the fabrication process.
Goals: Explain the need for copper balance
Explain the relationship of copper balance to bow and twist
Identify copper balance characteristics that influence delamination
Interpret copper thickness of plane and circuit layers to balance
6B.2 Demonstrate proper use of borders when panelizing a specific number of boards on a
given size panel.
Goals: Predict number of boards a panel can accommodate, with borders
Differentiate fabrication and assembly panel border requirements
Determine optimum spacing of boards for assembly and test
Estimate the board to panel area requirements
6B.3 Analyze economic use of panel for a given board size.
Goals: Compare a variety of boards and choose the most economical one
Describe the hole break-away technique
Recommend routing widths between images
Describe scoring techniques referred to as "V' groove
6B.4 Describe the criticality of the board length to width relationship.
Goals: Define how to prevent bow and twist
Define different characteristics of etching and tolerances
Define the difference between dimensional stability or consistency
Describe the effects on test equipment
6B.5 Relate plating processes, elements used and cost to performance issues.
Goals: Describe cost impact of using SMOBC
Define the process used to apply soldermask Over Bare Copper
Describe the etching process for subtractive and semi-additive
Describe the Tin-Lead plating process and thickness capability
6B.6 Examine process allowances for conductor traces.
Goals: Describe the relationship between plating and etching
Determine an unacceptable under cut condition on conductors
Assess characteristics of four ounce copper on a .2mm conductor
Describe the differences between panel and pattern plating
6B.7 Define the process for applying tin/lead and the purpose for its use.
Goals: Describe differences between additive and subtractive processes
Recognize when fuzing is required
Determine the relationship of conductor etch resist to phototool
Determine the relationship of conductor etch resist to end product
6B.8 Employ etch-back formula in relation to minimum annular ring.
Goals: Describe etch-back principles and requirements
Describe minimum annular ring when considering etch-back
Describe plating characteristics of etch-back hole and build-up
Describe fabrication tolerances and target value for etch-back hole
6B.9 Apply hole aspect ratio classification.
Goals: Describe how aspect ratio of plated-thru holes effects producibility
Describe a low producibility board based on hole to thickness
Delineate the difference between 1:3 vs 1:9 aspect ratios
Determine sufficient plating requirements under various conditions
6B.10 Describe bow and twist characteristics.
Goals: Illustrate unacceptable bow and twist
Define board properties that create poor bow and twist conditions
Define methods to alleviate improper bow and twist
Classify bow and twist by board thickness
6B.11 Distinguish solder resist requirements.
Goals: Identify which boards require UL approval
Determine when soldermask is not necessary
Determine the need for and when to tent vias with soldermask
Describe soldermask to land relationships
6B.12 Illustrate conductor width and thickness conditions and manufacturability effect on rigid
boards made using the subtractive pattern plating process.
Goals: Define differences between internal and external layer processes
Describe the benefits of using thin foil as starting copper
Describe different over plating resists and the etching of each
Identify correlation between over-hang, outgrowth, and under-cut
6B.13 Identify special tooling for bare board manufacturer and component assembly that can
be generated from the design layout phase.
Goals: Explain the capability and lack of capability of gerber files
Explain the data requirements for assembly
Explain the data requirements for test
Explain fabrication documentation
LEVEL C
6C.1 Calculate board size limitation for specific fabrication equipment.
Goals: Recognize how panel shape affects cost
Determine proper panel size for given board size
Develop a strategy for maximum material usage on a panel
Define maximum tank sizes in an average fabrication facility
6C.2 Develop panelization requirements.
Goals: Select break-away style and number of "tabs" required
Describe thieving requirements in break-away areas
Describe special requirements for gold edge finger connectors
Assess the need for tooling holes and board fiducials
6C.3 Asses the value of CAM preparation.
Goals: Determine fabrication checks to be done prior to manufacturing
Define differences between Gerber, IGES, EDIF and IPC-DIF (D-350)
files
Document steps used for routing a board from a production panel
Define DRC rules used by the board fabricator
6C.4 Describe a First Article Inspection (FAI) test.
Goals: Develop method to determine that no holes are missing after drilling
Describe the use and benefits of AOI, or other optical techniques
Describe the use of and need for destructive testing as part of FAI
Develop strategy to determine under & over etch of fabricated board
LEVEL D
6D.1 Evaluate manufactures capability to qualify the finished product.
Goals: Establish a method for internal layer inspection post fabrication
Develop technique to verify compliance with fabrication data
Analyze proper registration of soldermask
Develop methods for destructive and non-destructive testing
6D.2 Contrast production level from prototype fabrication facilities
Goals: Establish criteria for acceptability from prototype manufacturers
Establish criteria for acceptability from production facilities
Examine delivery time vs cost criteria between prod. and prototype
Evaluate both manufacturing facilities for equipment capability
6D.3 Assess performance of designers to accomplish low and high level designs.
Goals: Determine design tool literacy as related to job requirements
Determine experience of prospective employees
Establish and implement need training programs
Validate qualification of designer capabilities in on-going basis
7 - PHYSICAL BOARD REQUIREMENTS
LEVEL A
7A.1 Describe thermal management techniques for components.
Goals: Define thermal management as it applies to components
Identify components with high thermal ratings
Explain placement considerations for hot components
Detail the various methods used to dissipate component heat
7A.2 Describe thermal management techniques for boards.
Goals: Identify methods of cooling at the bare board level
Describe board construction using thermal planes
Detail what a thermal via provides to manage thermal characteristics
Define the relationship of high heat components to board stress
LEVEL B
7B.1 Determine the requirements which affect the physical parameters of the board.
Goals: Define the relationship of component count and conductor density
Describe mechanical restrictions that determine board size
Relate component and circuit density to layer count
Detail the manufacturing steps and their optimization to reduce cost
7B.2 Differentiate between physical requirements for digital vs analog circuits.
Goals: Define the differences in decoupling for analog /digital(A/D) circuits
Define the differences in power supplies in analog/digital circuits
Define differences of electronic components used for A/D circuits
Detail A/D component size, shape and mounting characteristics
7B.3 Apply thermal management techniques for components.
Goals: Identify power components and methods of heat removal
Define methods to acquire and apply component dissipation factors
Explain what is thermal matching and when is it required
Describe a thermal dissipation map and when it is required
7B.4 Apply thermal management techniques for boards.
Goals: Identify air flow direction and efficient component arrangement
Define using heat sinking planes and proper balanced construction
Define thermal relief to permit solder to attach lead into hole
Describe techniques for heat dissipation from thermal planes
LEVEL C
7C.1 Identify physical and electrical properties that impact structural strength.
Goals: Define board thicknesses for various structural support applications
Describe pros & cons of thick planes used to enhance strength
Define balanced circuitry and impact on bow and twist
Define electrical parameters effected by asymmetrical constructions
7C.2 Identify material physical and electrical characteristics associated with PCB stiffeners.
Goals: Describe the methods of designing for, and attaching stiffeners
Detail the mechanical properties of a stiffener and the effect
Describe equations needed to evaluate materials used for stiffeners
Define electrical clearance or using a stiffener as part of a circuit
7C.3 Identify thermal management techniques for components.
Goals: Identify heat removal techniques as a part of component mounting
Define the major types of heat transfer techniques
Describe heat sink configurations that use thermal convection
Describe thermal conduction techniques and board characteristics
7C.4 Identify thermal management techniques for boards.
Goals: Describe system methods to remove heat from planes
Define connection methods of planes to frame for heat removal
Describe methods for board "hot spot" determination
Define board fabrication materials used for heat sinking
LEVEL D
7D.1 Specify conditions that would warrant vibration analysis.
Goals: Define environments that have high degrees of vibration exposure
Determine trade-offs of packing materials to reduce vibration impact
Define methods of board hold-down and their influence on reliability
Define parameters that are a part of vibrational analysis
7D.2 Identify and Specify guidelines to prevent vibration failures.
Goals: Define methodology of determining board deflection characteristics
Describe component size, shape and weight for special analysis
Define the need, use and installation of vibration isolators
Define component height and mounting restrictions to reduce failure
7D.3 Identify guidelines for system level thermal management.
Goals: Describe BD Assembly and System thermal management differences
Detail methods of heat transfer from BD Assembly to System
Analyze the contribution of heat from BD Assemblies to the System
Define methods of system level heat dissipation
8 - DOCUMENTATION TECHNIQUES
LEVEL A
8A.1 Differentiate between bilateral tolerance and geometric tolerance.
Goals: Explain the use of the two systems for printed board fab data
Explain the advantages of geometric tolerancing
Define the benefits of bilateral tolerance
Describe information in IPC-D-300 and relationship to ANSI Y14.5
8A.2 Locate solder resist coatings utilizing geometric dimensions.
Goals: Describe use of datum features
Define the need for one Datum plane vs using two Datum planes
Explain secondary and tertiary Datum planes
Describe why board edges should not be used as Datum planes
8A.3 By illustration, show board profile and tolerance datum reference.
Goals: Explain and show a typical data point or feature
Describe true position dimensioning techniques, provide examples
Describe and show bilaterial dimension tolerance zones
Explain and show the use of two datum features; also three and four
8A.4 By illustration show conductor pattern datum reference.
Goals: Explain the need for global fiducials
Indicate when dimensioning method can cause assembly problems
Correlate board pattern and datum to assembly panel datum's
Define position control techniques of conductive pattern to datum's
8A.5 By illustration show PTH datum reference.
Goals: Explain why it is critical to properly dimension PTH boards
Provide examples and registration tolerances for PTH boards
Define relationship to datum reference for conductor configuration
Define relationship to datum reference for hole pattern
8A.6 By illustration show tooling hole datum reference.
Goals: Explain tooling hole use and whether they are on or off the board
Define how tooling holes are dimensioned compared to other holes
Describe the optimum number of tooling holes for a single board
Describe the relationship of board to panel tooling holes
8A.7 Identify ANSI 14.5 datum symbols.
Goals: Define symbols and dimensions used in true position call outs
Explain the use of true position symbols vs coordinate dimensions
Describe the method to delineate a profile tolerance
Explain the difference between MMC and LMC for plated-thru holes
8A.8 Describe documentation requirement for printed board fastening hardware.
Goals: Define which document calls for fastening hardware
Explain details necessary to properly document fastening hardware
Define general notes used in conjunction with fastening hardware
Indicate rules when hardware description is on the master drawing
8A.9 Describe the minimum drawing requirements needed to document a printed board
design.
Goals: Describe the detailed requirements for a master drawing
Define details necessary for assembly and part description
Explain the use of test coupons & how they should be documented
Define the documentation for engineering and handbook schematics
8A.10 Apply board level documentation.
Goals: Define notes to be included on the master drawing
Describe relationship between master drawing and the phototools
Differentiate production master from artwork or artwork master
Define methods used to locate hole and conductive patterns
8A.11 Describe the minimum requirement for a master drawing.
Goals: Explain differences between type 1, 2, and 3 documentation
Define when minimum documentation may be used
Determine need for additional documentation and when necessary
Define hole call-out and description on a minimum master drawing
8A.12 Describe the acceptability criteria for artwork masters.
Goals: Define the type of defects that can occur on a master artwork
Describe how manufacturing allowances are incorporated in artwork
Differentiate between the artwork master and the production master
Define methods used to provide circuit feature description data
LEVEL B
8B.1 Establish and identify the required datum planes.
Goals: Describe the primary datum plane
Describe the secondary datum plane
Describe the tertiary datum plane
Explain the location of the point(s) of origin; coordinate zero
8B.2 Describe the selection criteria for datum features.
Goals: Define acceptable features and non-use of board edges as datums
Explain which reference planes should be used to control material
Define what features need to be controlled by the primary datum
Explain when a single plane is sufficient
8B.3 Classify hole and slot locations tolerances, according to a modular grid system by their
end item purpose (thru, mtg hole, key-in slot, PTH, etc.).
Goals: Define the tolerances needed to identify keying slot locations
Define hole clearance relationship for mounting hardware
Describe tolerance conditions for mounting a DIP on a metric grid
Determine slot location methods based on mounting stud clearance
8B.4 Produce a mutually perpendicular datum reference frame for a single board description
and its relationship to panel layout for efficient production.
Goals: Relate coordinates of board features to panel step and repeat
Translate single image point of origin to panel coordinates
Define relationship of datum reference of board, panel and assembly
Describe point of origin difference between each assembled side
8B.5 Define minimum requirements for electronic description artwork masters.
Goals: Define how circuit features of a board are described electronically
Relate the method of providing tolerances on conductors
Describe electrical continuity for board circuitry
Define viewing conventions for conductive non-conductive layers
8B.6 Analyze tolerancing on a board level.
Goals: Describe different methods used to locate circuitry
Describe how bilateral dimensioning affects coordinate location
Define when coordinate location is used vs positioning tolerances
Show improvement in board acceptance using different system
LEVEL C
8C.1 Specify the requirements for the master drawing of a double sided or multilayer rigid
board.
Goals: Establish dimensioning scheme for a double-sided board
Define proper viewing criteria for layer stack-up
Describe proper note set for double-sided and multilayer boards
Define construction techniques and over-all thickness conditions
8C.2 Analyze board level tolerance conditions related to mounting enclosure.
Goals: Define the mounting clearance relationship in a card-guide system
Describe back plane connector mating tolerances for plug-in boards
Define the necessary clearance for board installation or removal
Define most liberal board periphery and enclosure dimensioning
8C.3 Develop board level documentation requirements.
Goals: Define the documentation package for full reprocurement
Describe how phototool or circuit configuration is referenced
Define the thickness and detailed board construction requirements
Develop techniques to use hole description as acceptance criteria
LEVEL D
8D.1 Analyze tolerancing on a system level.
Goals: Demonstrate differences between tolerancing at system/board level
Show how build up of tolerances affect fit at assembly system level
Develop techniques to incorporate interchangeability board types
Define the requirements for form, fit and function of bare boards
8D.2 Develop system level documentation requirements.
Goals: Define the documentation package for full product reprocurement
Describe handbook documentation related to product definition
Indicate over all system relationship of electronic interconnection
Define test specifications used to verify reliability and performance
8D.3 Document functional electrical engineering guidelines.
Goals: Define electrical test specifications
Establish requirements for shielding to prevent crosstalk
Define generic test fixture & application programming requirements
Define the check list of do's and don'ts for circuit speed enhancing
9 - TESTING TECHNOLOGY
LEVEL A
9A.1 Identify how to provide a test point feature.
Goals: Define the size or shape relationship
Describe the difference between lands and vias as test points
Identify conductor width to land size conditions
Distinguish the characteristics of soldermask used with test points
LEVEL B
9B.1 Identify what is done to differentiate between a circuit feature vs a test point.
Goals: Define when to use vias as test points
Identify the use of fiducials in determining test point location
Relate how to locate a test point feature
Detail how a conductor may be used as a test point
9B.2 Employ appropriate test strategies.
Goals: Identify requirements for bare board testing
Define component placement as it impacts testing
Distinguish between using 2.54mm and 2.mm grids
Identify differences between in-circuit and functional testing
LEVEL C
9C.1 Identify strategies for surface mount test implementation.
Goals: Define the benefits of single sided testing
Describe need for test points at passive components
Detail differences between soldermask or lands only philosophies
Define fan-out requirements for Quad Flat Packs
9C.2 Analyze layout and electrical characteristics required for full nodal test access.
Goals: Describe how determination is made for nodal access
Identify the principles for net isolation into a minimum set of nodes
Define the physical characteristics for two side access testing
Describe the layout limitations for a 2.0mm test grid
9C.3 Propose probe point physical land pattern characteristics for most efficient test fixture
performance.
Goals: Describe minimum land size for single side test access
Define differences between round vs square lands
Define top side and bottom side land configuration
Distinguish benefits of using test points as opposed to test vias
LEVEL D
9D.1 Identify critical parameters for functional test considerations.
Goals: Define the characteristics for go-no-go testing
Describe the circuit maturity necessary to permit functional test
Identify parameters necessary for fault location after functional test
Describe test fixtures for functional test optimization
9D.2 Formulate a testability design checklist.
Goals: Describe conductor routing path issues
Define methodologies for standardized power and ground
Define how "clocks" in the circuit should be handled
Define the "dos and don'ts" for digital design testing
9D.3 Constitute a system test philosophy.
Goals: Determine when "no nodal access" is acceptable
Differentiate between generic testing vs unique test fixturing
Determine individual board vs system test requirements
Define bare board and board assembly requirement relationship
10 - RELIABILITY ISSUES
LEVEL A
10A.1 Identify reliability terms and their impact on board design.
Goals: Describe low Mean Time Between Failure (MTBF) principles
Define thermal cycling relationship on bare board reliability
Define thermal cycling relationship on board Assembly reliability
Describe stress screening methods, other than thermal cycling
LEVEL B
10B.1 Identify tools and techniques used to obtain traceability of quality conformance.
Goals: Define the use of SPC in establishing quality assurance
Describe the need for in-process test coupons
Define the use of controlled experimentation as a quality tool
Define systems used for lot to lot or part quality traceability
LEVEL C
10C.1 List criteria for reliability of boards subject to shock and vibration in normal service.
Goals: Describe bare board parameters impacted by shock or vibration
Define test methodology used to characterize product reliability
Explain Assembly "weak links" when subjected to vibration or shock
Detail methods used to neutralize impact on board or assemblies
LEVEL D
10D.1 Specify quality assurance tools and certification techniques to prove design compliance.
Goals: Detail correlation of in-process testing to end product reliability
Define the relationship of ISO 9000 certification on design
Define test coupons or product characteristics that verify design
Detail the certification techniques used to approve a design process
10D.2 Develop quality assurance specification for tooling, materials, and handling.
Goals: Define the control requirements of manufacturing tools
Define configuration management for material control
Define a system that makes maximum use of quantity buying
Detail methodology to reduce nonconformance due to handling
10D.3 Develop quality assurance methodology for producing and
handling tooling materials
goals: Describe methods for producing high quality
photo tools
Define fixture development and control for assembly
soldering
Describe storage of material sensitive to temperatuer and
humidity
Explain hard and soft tooling and control techniques of each
On Thu, 7 Dec 1995, TIM EASTERLING wrote:
> Where is the closest test site for the Designer Certification to
> Huntsville, Al.?
>
> Is the study guide something that can be purchased , if so , how much
> is it?
>
> Is the workshop material available for an in house presentation, by
> in house managers or designers?
>
> Thanks
>
> Tim Easterling
> SCI Systems Inc.
> P.O. Box 1000 MS/305
> 13000 S. Memorial Parkway
> Huntsville, Al. 35803
>
> Ph: 205 882 4426
> Fx: 205 882 4305
>
> Email: [log in to unmask]
>
>
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