I've noticed that there is no spec for a different land pattern for
bottom side, wave soldered soic's in my IPC-SM-782A spec. Is my spec
out of date? or have requirements changed such that a top side, IR reflow
geometry can be used for a wave solder operation? What about the theiving
pads and longer-thinner lands we've used in the past? Are they still
necessary?
If information is missing in my spec, what equation should I use to
generate a geometry for a wave soldered package that is not covered
specifically by the '782A spec?
Thanks in advance.
Ken Barrett