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From [log in to unmask] Sat Apr 27 15: |
01:34 1996 |
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Fri, 06 Oct 95 19:32:01 -0400 |
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<"u9ym_1.0.5XI.Q4PTm"@ipc> |
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"Jim Marsico" <"marsico%Organization=Industrial & Mfg'g Engineering%Telephone=516-595-5879"@a1.allin1.ALLIN1.umc> |
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ALL-IN-1 IOS Server for VMS V3.0 PBL123A (US) ENGLISH 21-MAR-1992 |
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Darrell Wrote:
> I am looking for some technical information/ assistance regarding
> component lead tinning.
>
> Does anyone have any experience with a tinning process causing thermal
> shock to integrated circuits that would cause them to separate at the
> lead frame bond ? What is an acceptable thermal ramp rate ?
>
> The solder pot is held at 313 deg. Celsius (high temp solder), the
> component is suspended in type "RMA" flux for 5 seconds and then
> suspended in the solder pot for another 5 seconds. This process is
> repeated for two cycles. We are using an automated tinning machine
> which controls emmersion speed and depth for both the solder and flux.
>
> What is the typical thermal ramp rate that a component, such a DIP, is
> able to withstand ? This includes the cool-down (second immersion into
> flux prior to second tinning cycle is approximately 8 seconds).
>
If tinning at a high temperature is a problem, why not tin using eutectic
(lower temp) solder which will result in a solderable surface at a lower
temperature?
Jim Marsico
AIL Systems
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